From 28dceaec717111ae49383ecc8678bcef424cda14 Mon Sep 17 00:00:00 2001 From: Sen Chu Date: Tue, 18 Oct 2022 13:41:09 +0800 Subject: soc/mediatek: Move SPMI interface configuration to SoC folder The SPMI interface configuration is SoC-dependent. - MT8192 and MT8195 are the same. - MT8186 does not need to implement this. - MT8188 is different from MT8195, and we will submit another patch to fix this. BUG=b:249436110 TEST=build pass. BRANCH=corsola Signed-off-by: Sen Chu Signed-off-by: Bo-Chen Chen Change-Id: I4cf508a0690995a7fe7b7316269d07cb7a799191 Reviewed-on: https://review.coreboot.org/c/coreboot/+/68619 Reviewed-by: Yu-Ping Wu Reviewed-by: Yidi Lin Tested-by: build bot (Jenkins) --- src/soc/mediatek/mt8195/pmif_spmi.c | 21 +++++++++++++++++++++ 1 file changed, 21 insertions(+) (limited to 'src/soc/mediatek/mt8195') diff --git a/src/soc/mediatek/mt8195/pmif_spmi.c b/src/soc/mediatek/mt8195/pmif_spmi.c index 6883dd2f3a..ade44c5528 100644 --- a/src/soc/mediatek/mt8195/pmif_spmi.c +++ b/src/soc/mediatek/mt8195/pmif_spmi.c @@ -66,6 +66,27 @@ int spmi_config_master(void) return 0; } +void pmif_spmi_config(struct pmif *arb, int mstid) +{ + u32 cmd_per; + + /* Clear all cmd permission for per channel */ + write32(&arb->mtk_pmif->inf_cmd_per_0, 0); + write32(&arb->mtk_pmif->inf_cmd_per_1, 0); + write32(&arb->mtk_pmif->inf_cmd_per_2, 0); + write32(&arb->mtk_pmif->inf_cmd_per_3, 0); + + /* Enable if we need cmd 0~3 permission for per channel */ + cmd_per = PMIF_CMD_PER_3 << 28 | PMIF_CMD_PER_3 << 24 | + PMIF_CMD_PER_3 << 20 | PMIF_CMD_PER_3 << 16 | + PMIF_CMD_PER_3 << 8 | PMIF_CMD_PER_3 << 4 | + PMIF_CMD_PER_1_3 << 0; + write32(&arb->mtk_pmif->inf_cmd_per_0, cmd_per); + + cmd_per = PMIF_CMD_PER_3 << 4; + write32(&arb->mtk_pmif->inf_cmd_per_1, cmd_per); +} + void pmif_spmi_iocfg(void) { SET32_BITFIELDS(&mtk_iocfg_bm->eh_cfg_clr, SPMI_SCL, 0x7, SPMI_SDA, 0x7); -- cgit v1.2.3