From 03e002f64d5742039b8d3df2cfb3142ba9bc5b3a Mon Sep 17 00:00:00 2001 From: Yidi Lin Date: Thu, 4 Feb 2021 18:30:54 +0800 Subject: soc/mediatek/mt8195: Add timer support TEST=emerge-{oak, kukui, asurada, cherry} coreboot; verified on Asurada and Cherry P0 Signed-off-by: Yidi Lin Change-Id: Ic6a87e7d5983bf14ad123de82ed670a22a7be1aa Reviewed-on: https://review.coreboot.org/c/coreboot/+/52541 Reviewed-by: Hung-Te Lin Reviewed-by: Yu-Ping Wu Tested-by: build bot (Jenkins) --- src/soc/mediatek/mt8195/include/soc/addressmap.h | 1 + src/soc/mediatek/mt8195/include/soc/timer.h | 20 ++++++++++++++++++++ 2 files changed, 21 insertions(+) create mode 100644 src/soc/mediatek/mt8195/include/soc/timer.h (limited to 'src/soc/mediatek/mt8195/include') diff --git a/src/soc/mediatek/mt8195/include/soc/addressmap.h b/src/soc/mediatek/mt8195/include/soc/addressmap.h index 0f4bb8b450..417e2bd2c2 100644 --- a/src/soc/mediatek/mt8195/include/soc/addressmap.h +++ b/src/soc/mediatek/mt8195/include/soc/addressmap.h @@ -22,6 +22,7 @@ enum { GPT_BASE = IO_PHYS + 0x00008000, EINT_BASE = IO_PHYS + 0x0000B000, APMIXED_BASE = IO_PHYS + 0x0000C000, + SYSTIMER_BASE = IO_PHYS + 0x00017000, PMIF_SPI_BASE = IO_PHYS + 0x00024000, PMICSPI_MST_BASE = IO_PHYS + 0x00025000, PMIF_SPMI_BASE = IO_PHYS + 0x00027000, diff --git a/src/soc/mediatek/mt8195/include/soc/timer.h b/src/soc/mediatek/mt8195/include/soc/timer.h new file mode 100644 index 0000000000..da073e1b7a --- /dev/null +++ b/src/soc/mediatek/mt8195/include/soc/timer.h @@ -0,0 +1,20 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + +#ifndef SOC_MEDIATEK_MT8195_TIMER_H +#define SOC_MEDIATEK_MT8195_TIMER_H + +#include + +enum { + TIE_0_EN = 1 << 3, + COMP_15_EN = 1 << 10, + COMP_20_EN = 1 << 11, + COMP_25_EN = 1 << 12, + + COMP_FEATURE_MASK = COMP_15_EN | COMP_20_EN | COMP_25_EN | TIE_0_EN, + + COMP_15_MASK = COMP_15_EN, + COMP_20_MASK = COMP_20_EN | TIE_0_EN, + COMP_25_MASK = COMP_20_EN | COMP_25_EN, +}; +#endif -- cgit v1.2.3