From f06dd678e6bc916d29335b945f54d732b31e1ee2 Mon Sep 17 00:00:00 2001 From: Po Xu Date: Wed, 18 Nov 2020 15:25:09 +0800 Subject: soc/mediatek/mt8192: Enable MT8192 auxadc driver Enable reading from auxadc on MediaTek 8192 platform. Reference datasheet: RH-A-2020-0070, v1.0 Signed-off-by: Po Xu Change-Id: Ic4c965fc3571637d882eb297e405a5d9e6f77dd3 Reviewed-on: https://review.coreboot.org/c/coreboot/+/47695 Tested-by: build bot (Jenkins) Reviewed-by: Hung-Te Lin --- src/soc/mediatek/mt8192/include/soc/addressmap.h | 2 ++ src/soc/mediatek/mt8192/include/soc/auxadc.h | 23 +++++++++++++++++++++++ src/soc/mediatek/mt8192/include/soc/efuse.h | 17 +++++++++++++++++ 3 files changed, 42 insertions(+) create mode 100644 src/soc/mediatek/mt8192/include/soc/auxadc.h create mode 100644 src/soc/mediatek/mt8192/include/soc/efuse.h (limited to 'src/soc/mediatek/mt8192/include') diff --git a/src/soc/mediatek/mt8192/include/soc/addressmap.h b/src/soc/mediatek/mt8192/include/soc/addressmap.h index 69d3157702..12094ffe5d 100644 --- a/src/soc/mediatek/mt8192/include/soc/addressmap.h +++ b/src/soc/mediatek/mt8192/include/soc/addressmap.h @@ -25,6 +25,7 @@ enum { PMIF_SPMI_BASE = IO_PHYS + 0x00027000, PMICSPI_MST_BASE = IO_PHYS + 0x00028000, SPMI_MST_BASE = IO_PHYS + 0x00029000, + AUXADC_BASE = IO_PHYS + 0x01001000, UART0_BASE = IO_PHYS + 0x01002000, SPI0_BASE = IO_PHYS + 0x0100A000, SPI1_BASE = IO_PHYS + 0x01010000, @@ -36,6 +37,7 @@ enum { SPI7_BASE = IO_PHYS + 0x0101E000, SSUSB_IPPC_BASE = IO_PHYS + 0x01203e00, SFLASH_REG_BASE = IO_PHYS + 0x01234000, + EFUSEC_BASE = IO_PHYS + 0x01C10000, IOCFG_RM_BASE = IO_PHYS + 0x01C20000, IOCFG_BM_BASE = IO_PHYS + 0x01D10000, IOCFG_BL_BASE = IO_PHYS + 0x01D30000, diff --git a/src/soc/mediatek/mt8192/include/soc/auxadc.h b/src/soc/mediatek/mt8192/include/soc/auxadc.h new file mode 100644 index 0000000000..3289a22ccf --- /dev/null +++ b/src/soc/mediatek/mt8192/include/soc/auxadc.h @@ -0,0 +1,23 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + +#ifndef _MTK_ADC_H +#define _MTK_ADC_H + +#include +#include +#include + +typedef struct mtk_auxadc_regs { + uint32_t con0; + uint32_t con1; + uint32_t con1_set; + uint32_t con1_clr; + uint32_t con2; + uint32_t data[16]; + uint32_t reserved[16]; + uint32_t misc; +} mtk_auxadc_regs; + +static struct mt8192_infracfg_regs *const mtk_infracfg = mt8192_infracfg; + +#endif diff --git a/src/soc/mediatek/mt8192/include/soc/efuse.h b/src/soc/mediatek/mt8192/include/soc/efuse.h new file mode 100644 index 0000000000..f0f3405a5a --- /dev/null +++ b/src/soc/mediatek/mt8192/include/soc/efuse.h @@ -0,0 +1,17 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + +#ifndef _MTK_EFUSE_H +#define _MTK_EFUSE_H + +#include +#include + +struct efuse_regs { + uint32_t rserved[109]; + uint32_t adc_cali_reg; +}; + +check_member(efuse_regs, adc_cali_reg, 0x1b4); +static struct efuse_regs *const mtk_efuse = (void *)EFUSEC_BASE; + +#endif -- cgit v1.2.3