From 916e2efad4daaf6572107ed2e9b669e434eb5629 Mon Sep 17 00:00:00 2001 From: Huayang Duan Date: Thu, 6 Aug 2020 15:33:38 +0800 Subject: soc/mediatek/mt8192: Init DPM DPM is a hardware module for DRAM power management and for better power saving in low power mode. BUG=none TEST=Boots correctly on Asurada Signed-off-by: Huayang Duan Change-Id: I16b341ad63940b45b886c4a7fd733c1970624e40 Reviewed-on: https://review.coreboot.org/c/coreboot/+/46393 Reviewed-by: Hung-Te Lin Tested-by: build bot (Jenkins) --- src/soc/mediatek/mt8192/dpm.c | 48 +++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 48 insertions(+) create mode 100644 src/soc/mediatek/mt8192/dpm.c (limited to 'src/soc/mediatek/mt8192/dpm.c') diff --git a/src/soc/mediatek/mt8192/dpm.c b/src/soc/mediatek/mt8192/dpm.c new file mode 100644 index 0000000000..7acdf68feb --- /dev/null +++ b/src/soc/mediatek/mt8192/dpm.c @@ -0,0 +1,48 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + +#include +#include +#include +#include +#include + +static void reset_dpm(struct mtk_mcu *mcu) +{ + /* write bootargs */ + write32(&mtk_dpm->twam_window_len, 0x0); + write32(&mtk_dpm->twam_mon_type, 0x0); + + /* free RST */ + setbits32(&mtk_dpm->sw_rstn, DPM_SW_RSTN_RESET); +} + +static struct mtk_mcu dpm_mcu[] = { + { + .firmware_name = CONFIG_DPM_DM_FIRMWARE, + .run_address = (void *)DPM_DM_SRAM_BASE, + }, + { + .firmware_name = CONFIG_DPM_PM_FIRMWARE, + .run_address = (void *)DPM_PM_SRAM_BASE, + .reset = reset_dpm, + }, +}; + +int dpm_init(void) +{ + int i; + struct mtk_mcu *dpm; + + /* config DPM SRAM layout */ + clrsetbits32(&mtk_dpm->sw_rstn, DPM_MEM_RATIO_MASK, DPM_MEM_RATIO_CFG1); + + for (i = 0; i < ARRAY_SIZE(dpm_mcu); i++) { + dpm = &dpm_mcu[i]; + dpm->load_buffer = _dram_dma; + dpm->buffer_size = REGION_SIZE(dram_dma); + if (mtk_init_mcu(dpm)) + return -1; + } + + return 0; +} -- cgit v1.2.3