From ba616438e9e81355eb447034fc3159c6db80a69b Mon Sep 17 00:00:00 2001 From: CK Hu Date: Mon, 11 May 2020 16:27:53 +0800 Subject: soc/mediatek/mt8192: Use SPI-NOR as flash controller Add a SPI-NOR flash controller which supports pio mode. Signed-off-by: CK Hu Change-Id: I1e38672a532dd8234b3ef24c84113888c8795810 Reviewed-on: https://review.coreboot.org/c/coreboot/+/44453 Tested-by: build bot (Jenkins) Reviewed-by: Hung-Te Lin --- src/soc/mediatek/mt8192/Makefile.inc | 4 ++++ 1 file changed, 4 insertions(+) (limited to 'src/soc/mediatek/mt8192/Makefile.inc') diff --git a/src/soc/mediatek/mt8192/Makefile.inc b/src/soc/mediatek/mt8192/Makefile.inc index 2a825fbdec..01db141950 100644 --- a/src/soc/mediatek/mt8192/Makefile.inc +++ b/src/soc/mediatek/mt8192/Makefile.inc @@ -1,6 +1,7 @@ ifeq ($(CONFIG_SOC_MEDIATEK_MT8192),y) bootblock-y += bootblock.c +bootblock-y += flash_controller.c bootblock-y += ../common/gpio.c gpio.c bootblock-y += ../common/mmu_operations.c bootblock-$(CONFIG_SPI_FLASH) += ../common/spi.c spi.c @@ -8,6 +9,7 @@ bootblock-y += ../common/timer.c bootblock-y += ../common/uart.c bootblock-y += ../common/wdt.c +verstage-y += flash_controller.c verstage-y += ../common/gpio.c gpio.c verstage-$(CONFIG_SPI_FLASH) += ../common/spi.c spi.c verstage-y += ../common/timer.c @@ -15,11 +17,13 @@ verstage-y += ../common/uart.c romstage-y += ../common/cbmem.c romstage-y += emi.c +romstage-y += flash_controller.c romstage-y += ../common/gpio.c gpio.c romstage-$(CONFIG_SPI_FLASH) += ../common/spi.c spi.c romstage-y += ../common/timer.c romstage-y += ../common/uart.c +ramstage-y += flash_controller.c ramstage-y += ../common/gpio.c gpio.c ramstage-y += emi.c ramstage-$(CONFIG_SPI_FLASH) += ../common/spi.c spi.c -- cgit v1.2.3