From a87649cee3883fd0044a212500487acd12912297 Mon Sep 17 00:00:00 2001 From: Jarried Lin Date: Tue, 16 Jul 2024 18:26:23 +0800 Subject: soc/mediatek: Move memmory macros into MediaTek common directory To reduce duplicate memmory macros of MediaTek SoCs, move the header file to a common directory. TEST=Build geralt pass BUG=b:317009620 Change-Id: Iea4add8fe3735085c13438a2e177bec177913191 Signed-off-by: Jarried Lin Reviewed-on: https://review.coreboot.org/c/coreboot/+/83571 Reviewed-by: Yidi Lin Tested-by: build bot (Jenkins) --- src/soc/mediatek/mt8188/include/soc/memlayout.ld | 17 ++--------------- 1 file changed, 2 insertions(+), 15 deletions(-) (limited to 'src/soc/mediatek/mt8188/include') diff --git a/src/soc/mediatek/mt8188/include/soc/memlayout.ld b/src/soc/mediatek/mt8188/include/soc/memlayout.ld index ed3b71be07..3dc386e1f4 100644 --- a/src/soc/mediatek/mt8188/include/soc/memlayout.ld +++ b/src/soc/mediatek/mt8188/include/soc/memlayout.ld @@ -1,19 +1,6 @@ /* SPDX-License-Identifier: GPL-2.0-only OR MIT */ -#include -#include -/* - * SRAM_L2C is the half part of L2 cache that we borrow to be used as SRAM. - * It will be returned before starting the ramstage. - * SRAM_L2C and SRAM can be cached, but only SRAM is DMA-able. - */ -#define SRAM_L2C_START(addr) REGION_START(sram_l2c, addr) -#define SRAM_L2C_END(addr) REGION_END(sram_l2c, addr) -#define DRAM_INIT_CODE(addr, size) \ - REGION(dram_init_code, addr, size, 64K) -#define DRAM_DMA(addr, size) \ - REGION(dram_dma, addr, size, 4K) \ - _ = ASSERT(size % 4K == 0, \ - "DRAM DMA buffer should be multiple of smallest page size (4K)!"); +#include + SECTIONS { /* MT8188 has 192KB SRAM in total. */ -- cgit v1.2.3