From abf34584dbfecdd74db36dd24f6008d1051a96a9 Mon Sep 17 00:00:00 2001
From: Jarried Lin <jarried.lin@mediatek.corp-partner.google.com>
Date: Fri, 16 Aug 2024 10:24:18 +0800
Subject: soc/mediatek: Refactor MMU operation for L2C SRAM and DMA

Refactor mmu operation by
- moving mtk_soc_disable_l2c_sram to l2c_ops.c
- keeping mtk_soc_after_dram in mmu_cmops.c

Change-Id: I14bd8a82e0b5f8f00ce2b52e5aee918e130912d4
Signed-off-by: Jarried Lin <jarried.lin@mediatek.corp-partner.google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/83937
Reviewed-by: Yu-Ping Wu <yupingso@google.com>
Reviewed-by: Yidi Lin <yidilin@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
---
 src/soc/mediatek/mt8188/Makefile.mk | 2 ++
 1 file changed, 2 insertions(+)

(limited to 'src/soc/mediatek/mt8188/Makefile.mk')

diff --git a/src/soc/mediatek/mt8188/Makefile.mk b/src/soc/mediatek/mt8188/Makefile.mk
index 727b3f8c7c..9015a63e34 100644
--- a/src/soc/mediatek/mt8188/Makefile.mk
+++ b/src/soc/mediatek/mt8188/Makefile.mk
@@ -21,6 +21,7 @@ romstage-y += ../common/clkbuf.c
 romstage-y += ../common/dram_init.c
 romstage-y += ../common/dramc_param.c
 romstage-y += ../common/emi.c
+romstage-y += ../common/l2c_ops.c
 romstage-y += ../common/memory.c
 romstage-y += ../common/memory_test.c
 romstage-y += ../common/mmu_operations.c ../common/mmu_cmops.c
@@ -43,6 +44,7 @@ ramstage-y += ../common/dpm.c
 ramstage-$(CONFIG_DPM_FOUR_CHANNEL) += ../common/dpm_4ch.c
 ramstage-y += ../common/dsi.c ../common/mtk_mipi_dphy.c
 ramstage-y += ../common/emi.c
+ramstage-y += ../common/l2c_ops.c
 ramstage-y += ../common/mcu.c
 ramstage-y += ../common/mcupm.c
 ramstage-y += ../common/mmu_operations.c ../common/mmu_cmops.c
-- 
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