From 55a1ba30437c546763dee2476b0f0fbccc3530c3 Mon Sep 17 00:00:00 2001 From: Mandy Liu Date: Tue, 11 Oct 2022 13:40:07 +0800 Subject: soc/mediatek/mt8186: Add mtcmos power-on control for ADSP To use SOF correctly, we need to enable power domain of ADSP. TEST=SOF driver is functional. BUG=b:204229221 Signed-off-by: Mandy Liu Change-Id: I39d1357af5f901a91379fdf7e595f16952b962de Reviewed-on: https://review.coreboot.org/c/coreboot/+/68288 Reviewed-by: Yidi Lin Reviewed-by: Yu-Ping Wu Tested-by: build bot (Jenkins) --- src/soc/mediatek/mt8186/include/soc/spm.h | 18 ++++++++++++++++++ 1 file changed, 18 insertions(+) (limited to 'src/soc/mediatek/mt8186/include') diff --git a/src/soc/mediatek/mt8186/include/soc/spm.h b/src/soc/mediatek/mt8186/include/soc/spm.h index 8b8f9b2f23..b402b2cff0 100644 --- a/src/soc/mediatek/mt8186/include/soc/spm.h +++ b/src/soc/mediatek/mt8186/include/soc/spm.h @@ -867,4 +867,22 @@ static const struct power_domain_data disp[] = { static const struct power_domain_data audio[] = { }; +static const struct power_domain_data adsp[] = { + { + .pwr_con = &mtk_spm->adsp_ao_pwr_con, + .pwr_sta_mask = 0x1 << 17, + }, + { + .pwr_con = &mtk_spm->adsp_infra_pwr_con, + .pwr_sta_mask = 0x1 << 10, + }, + { + .pwr_con = &mtk_spm->adsp_pwr_con, + .pwr_sta_mask = 0x1 << 31, + .sram_pdn_mask = 0x1 << 8, + .sram_ack_mask = 0x1 << 12, + .caps = SCPD_SRAM_ISO, + }, +}; + #endif /* SOC_MEDIATEK_MT8186_SPM_H */ -- cgit v1.2.3