From fcdbce2decbf88a39b2da29ad1137a08e1d9ca95 Mon Sep 17 00:00:00 2001
From: Huayang Duan <huayang.duan@mediatek.com>
Date: Wed, 26 Sep 2018 16:33:18 +0800
Subject: mediatek/mt8183: Add DDR driver of rx dqs gating calibration part

BUG=b:80501386
BRANCH=none
TEST=Boots correctly on Kukui, and inits DRAM successfully with related
     patches.

Change-Id: I504d6d5c9ea01b11a9f2a05b5ee4b5f1af87e23f
Signed-off-by: Huayang Duan <huayang.duan@mediatek.com>
Reviewed-on: https://review.coreboot.org/c/28841
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: You-Cheng Syu <youcheng@google.com>
Reviewed-by: Hung-Te Lin <hungte@chromium.org>
---
 src/soc/mediatek/mt8183/include/soc/dramc_pi_api.h | 5 +++++
 1 file changed, 5 insertions(+)

(limited to 'src/soc/mediatek/mt8183/include')

diff --git a/src/soc/mediatek/mt8183/include/soc/dramc_pi_api.h b/src/soc/mediatek/mt8183/include/soc/dramc_pi_api.h
index 6fc3ef71f4..3fb8c25d47 100644
--- a/src/soc/mediatek/mt8183/include/soc/dramc_pi_api.h
+++ b/src/soc/mediatek/mt8183/include/soc/dramc_pi_api.h
@@ -111,6 +111,11 @@ enum {
 	RESTORE_VALUE
 };
 
+struct reg_value {
+	u32 *addr;
+	u32 value;
+};
+
 enum {
 	DQ_DIV_SHIFT = 3,
 	DQ_DIV_MASK = BIT(DQ_DIV_SHIFT) - 1,
-- 
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