From f42db110d0174f05745e3558067d114eae37825b Mon Sep 17 00:00:00 2001 From: Tristan Shieh Date: Wed, 6 Jun 2018 12:52:20 +0800 Subject: mediatek: Refine whitespace and formating changes This patch fix whitespace and formating issues: 1. Using two spaces between code and single line comment. 2. No space after asterisk. 3. Fix checkpatch error. 4. Remove spaces after cast operators. BUG=b:80501386 BRANCH=none TEST=the refactored code works fine on the new platform (with the rest of the patches applied) and Elm platform Change-Id: Ib36c99b141c94220776fab606eb36af8f64f65bb Signed-off-by: Tristan Shieh Reviewed-on: https://review.coreboot.org/26880 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi --- src/soc/mediatek/mt8173/include/soc/ddp.h | 27 +++++++++++++--------- src/soc/mediatek/mt8173/include/soc/dsi.h | 12 +++++----- .../mediatek/mt8173/include/soc/flash_controller.h | 2 +- src/soc/mediatek/mt8173/include/soc/mcucfg.h | 2 +- src/soc/mediatek/mt8173/include/soc/pericfg.h | 2 +- src/soc/mediatek/mt8173/include/soc/pmic_wrap.h | 2 +- src/soc/mediatek/mt8173/include/soc/spm.h | 2 +- src/soc/mediatek/mt8173/include/soc/timer.h | 2 +- src/soc/mediatek/mt8173/include/soc/usb.h | 2 +- 9 files changed, 29 insertions(+), 24 deletions(-) (limited to 'src/soc/mediatek/mt8173/include') diff --git a/src/soc/mediatek/mt8173/include/soc/ddp.h b/src/soc/mediatek/mt8173/include/soc/ddp.h index 20e356a909..0bd832e90f 100644 --- a/src/soc/mediatek/mt8173/include/soc/ddp.h +++ b/src/soc/mediatek/mt8173/include/soc/ddp.h @@ -142,7 +142,7 @@ struct mmsys_cfg_regs { check_member(mmsys_cfg_regs, mmsys_sw1_rst_b, 0x144); check_member(mmsys_cfg_regs, hdmi_en, 0x904); -static struct mmsys_cfg_regs * const mmsys_cfg = (void *) MMSYS_BASE; +static struct mmsys_cfg_regs *const mmsys_cfg = (void *)MMSYS_BASE; /* DISP_REG_CONFIG_MMSYS_CG_CON0 Configures free-run clock gating 0 @@ -240,7 +240,7 @@ struct disp_mutex_regs { }; check_member(disp_mutex_regs, debug_out_sel, 0x100); -static struct disp_mutex_regs * const disp_mutex = (void *) DISP_MUTEX_BASE; +static struct disp_mutex_regs *const disp_mutex = (void *)DISP_MUTEX_BASE; enum { MUTEX_MOD_DISP_OVL0 = BIT(11), @@ -306,8 +306,9 @@ struct disp_ovl_regs { }; check_member(disp_ovl_regs, l3_addr, 0xFA0); -static struct disp_ovl_regs * const disp_ovl[2] = - {(void *) DIS_OVL0_BASE, (void *) DIS_OVL1_BASE}; +static struct disp_ovl_regs *const disp_ovl[2] = { + (void *)DIS_OVL0_BASE, (void *)DIS_OVL1_BASE +}; struct disp_rdma_regs { u32 int_enable; @@ -341,8 +342,11 @@ enum { }; check_member(disp_rdma_regs, debug_out_sel, 0x94); -static struct disp_rdma_regs * const disp_rdma[3] = - {(void *)DISP_RDMA0_BASE, (void *)DISP_RDMA1_BASE, (void *)DISP_RDMA2_BASE}; +static struct disp_rdma_regs *const disp_rdma[3] = { + (void *)DISP_RDMA0_BASE, + (void *)DISP_RDMA1_BASE, + (void *)DISP_RDMA2_BASE +}; struct disp_od_regs { u32 en; @@ -363,7 +367,7 @@ struct disp_od_regs { }; check_member(disp_od_regs, misc, 0x48); -static struct disp_od_regs * const disp_od = (void *)DISP_OD_BASE; +static struct disp_od_regs *const disp_od = (void *)DISP_OD_BASE; enum { OD_RELAY_MODE = BIT(0), @@ -396,7 +400,7 @@ struct disp_ufoe_regs { }; check_member(disp_ufoe_regs, dbg[7], 0x15C); -static struct disp_ufoe_regs * const disp_ufoe = (void *)DISP_UFOE_BASE; +static struct disp_ufoe_regs *const disp_ufoe = (void *)DISP_UFOE_BASE; enum { UFO_BYPASS = BIT(2), @@ -407,7 +411,7 @@ struct disp_split_regs { u32 start; }; -static struct disp_split_regs * const disp_split = (void *)DISP_SPLIT1_BASE; +static struct disp_split_regs *const disp_split = (void *)DISP_SPLIT1_BASE; struct disp_color_regs { u8 reserved0[1024]; @@ -423,8 +427,9 @@ check_member(disp_color_regs, cfg_main, 0x400); check_member(disp_color_regs, start, 0xC00); check_member(disp_color_regs, width, 0xC50); check_member(disp_color_regs, height, 0xC54); -static struct disp_color_regs * const disp_color[2] = - {(void *)DISP_COLOR0_BASE, (void *)DISP_COLOR1_BASE}; +static struct disp_color_regs *const disp_color[2] = { + (void *)DISP_COLOR0_BASE, (void *)DISP_COLOR1_BASE +}; enum { COLOR_BYPASS_ALL = BIT(7), diff --git a/src/soc/mediatek/mt8173/include/soc/dsi.h b/src/soc/mediatek/mt8173/include/soc/dsi.h index 68f45d1144..ca35bd1759 100644 --- a/src/soc/mediatek/mt8173/include/soc/dsi.h +++ b/src/soc/mediatek/mt8173/include/soc/dsi.h @@ -91,8 +91,8 @@ check_member(dsi_regs, dsi_phy_lccon, 0x104); check_member(dsi_regs, dsi_phy_timecon3, 0x11c); check_member(dsi_regs, dsi_vm_cmd_con, 0x130); check_member(dsi_regs, dsi_cmdq0, 0x200); -static struct dsi_regs * const dsi0 = (void *)DSI0_BASE; -static struct dsi_regs * const dsi1 = (void *)DSI1_BASE; +static struct dsi_regs *const dsi0 = (void *)DSI0_BASE; +static struct dsi_regs *const dsi1 = (void *)DSI1_BASE; /* DSI_INTSTA */ enum { @@ -227,8 +227,8 @@ struct mipi_tx_regs { check_member(mipi_tx_regs, dsi_top_con, 0x40); check_member(mipi_tx_regs, dsi_pll_pwr, 0x68); -static struct mipi_tx_regs * const mipi_tx0 = (void *)MIPI_TX0_BASE; -static struct mipi_tx_regs * const mipi_tx1 = (void *)MIPI_TX0_BASE; +static struct mipi_tx_regs *const mipi_tx0 = (void *)MIPI_TX0_BASE; +static struct mipi_tx_regs *const mipi_tx1 = (void *)MIPI_TX0_BASE; /* MIPITX_DSI0_CON */ enum { @@ -322,8 +322,8 @@ struct lvds_tx1_regs { u32 vopll_ctl3; }; -static struct lvds_tx1_regs * const lvds_tx1 = (void *)(MIPI_TX0_BASE + 0x800); -static struct lvds_tx1_regs * const lvds_tx2 = (void *)(MIPI_TX1_BASE + 0x800); +static struct lvds_tx1_regs *const lvds_tx1 = (void *)(MIPI_TX0_BASE + 0x800); +static struct lvds_tx1_regs *const lvds_tx2 = (void *)(MIPI_TX1_BASE + 0x800); /* LVDS_VOPLL_CTRL3 */ enum { diff --git a/src/soc/mediatek/mt8173/include/soc/flash_controller.h b/src/soc/mediatek/mt8173/include/soc/flash_controller.h index 82d167a054..da306c5f0a 100644 --- a/src/soc/mediatek/mt8173/include/soc/flash_controller.h +++ b/src/soc/mediatek/mt8173/include/soc/flash_controller.h @@ -85,7 +85,7 @@ struct mt8173_nor_regs { u32 fdma_end_dadr; }; check_member(mt8173_nor_regs, fdma_end_dadr, 0x724); -static struct mt8173_nor_regs * const mt8173_nor = (void *)SFLASH_REG_BASE; +static struct mt8173_nor_regs *const mt8173_nor = (void *)SFLASH_REG_BASE; int mtk_spi_flash_probe(const struct spi_slave *spi, struct spi_flash *flash); diff --git a/src/soc/mediatek/mt8173/include/soc/mcucfg.h b/src/soc/mediatek/mt8173/include/soc/mcucfg.h index c8749d3802..5c011507e6 100644 --- a/src/soc/mediatek/mt8173/include/soc/mcucfg.h +++ b/src/soc/mediatek/mt8173/include/soc/mcucfg.h @@ -102,6 +102,6 @@ struct mt8173_mcucfg_regs { check_member(mt8173_mcucfg_regs, mcusys_rw_rsvd1, 0x688); -static struct mt8173_mcucfg_regs * const mt8173_mcucfg = (void *)MCUCFG_BASE; +static struct mt8173_mcucfg_regs *const mt8173_mcucfg = (void *)MCUCFG_BASE; #endif /* __SOC_MEDIATEK_MT8173_MCUCFG_H__ */ diff --git a/src/soc/mediatek/mt8173/include/soc/pericfg.h b/src/soc/mediatek/mt8173/include/soc/pericfg.h index 8e3e477e31..5aa854287f 100644 --- a/src/soc/mediatek/mt8173/include/soc/pericfg.h +++ b/src/soc/mediatek/mt8173/include/soc/pericfg.h @@ -78,7 +78,7 @@ struct mt8173_pericfg_regs { u32 ssusb_pdn_sta; }; -static struct mt8173_pericfg_regs * const mt8173_pericfg = +static struct mt8173_pericfg_regs *const mt8173_pericfg = (void *)PERI_CON_BASE; /* diff --git a/src/soc/mediatek/mt8173/include/soc/pmic_wrap.h b/src/soc/mediatek/mt8173/include/soc/pmic_wrap.h index 7861b69c0f..6807b13cbe 100644 --- a/src/soc/mediatek/mt8173/include/soc/pmic_wrap.h +++ b/src/soc/mediatek/mt8173/include/soc/pmic_wrap.h @@ -25,7 +25,7 @@ s32 pwrap_write(u16 adr, u16 wdata); s32 pwrap_wacs2(u32 write, u16 adr, u16 wdata, u16 *rdata, u32 init_check); s32 pwrap_init(void); -static struct mt8173_pwrap_regs * const mt8173_pwrap = (void *)PMIC_WRAP_BASE; +static struct mt8173_pwrap_regs *const mt8173_pwrap = (void *)PMIC_WRAP_BASE; enum { WACS2 = 1 << 4 diff --git a/src/soc/mediatek/mt8173/include/soc/spm.h b/src/soc/mediatek/mt8173/include/soc/spm.h index 9c23562a9b..77516fc1f0 100644 --- a/src/soc/mediatek/mt8173/include/soc/spm.h +++ b/src/soc/mediatek/mt8173/include/soc/spm.h @@ -154,6 +154,6 @@ struct mt8173_spm_regs { check_member(mt8173_spm_regs, sleep_ca15_wfi_en[3], 0xf1c); -static struct mt8173_spm_regs * const mt8173_spm = (void *)SPM_BASE; +static struct mt8173_spm_regs *const mt8173_spm = (void *)SPM_BASE; #endif /* __SOC_MEDIATEK_MT8173_SPM_H__ */ diff --git a/src/soc/mediatek/mt8173/include/soc/timer.h b/src/soc/mediatek/mt8173/include/soc/timer.h index ac2f00f8e1..39aacb42c2 100644 --- a/src/soc/mediatek/mt8173/include/soc/timer.h +++ b/src/soc/mediatek/mt8173/include/soc/timer.h @@ -55,7 +55,7 @@ struct mt8173_gpt_regs { u32 apxgpt_irqmask1; }; -static struct mt8173_gpt_regs * const mt8173_gpt = (void *)GPT_BASE; +static struct mt8173_gpt_regs *const mt8173_gpt = (void *)GPT_BASE; enum { GPT_CON_EN = 0x01, diff --git a/src/soc/mediatek/mt8173/include/soc/usb.h b/src/soc/mediatek/mt8173/include/soc/usb.h index 915e2475ae..646b0774e7 100644 --- a/src/soc/mediatek/mt8173/include/soc/usb.h +++ b/src/soc/mediatek/mt8173/include/soc/usb.h @@ -134,7 +134,7 @@ struct sif_u2_phy_com { u32 reserved1[17]; u32 u2phydtm0; u32 u2phydtm1; - u32 reserved2[36]; /* 0x70 - 0xff */ + u32 reserved2[36]; /* 0x70 - 0xff */ }; check_member(sif_u2_phy_com, u2phydtm0, 0x68); -- cgit v1.2.3