From 47095d5ec35b4cbff9d4660cfe9521ed17a0d1ed Mon Sep 17 00:00:00 2001 From: Rex-BC Chen Date: Tue, 27 Apr 2021 21:20:06 +0800 Subject: soc/mediatek: Move the common part of SPI drivers to common/ The SPI drivers can be shared by MT8183, MT8192 and MT8195. TEST=emerge-{oak, kukui, asurada, cherry} coreboot; verified on Cherry P0 Signed-off-by: Rex-BC Chen Change-Id: I7bb7809a88fbda67eca67ecfde45b9cb5f09dffe Reviewed-on: https://review.coreboot.org/c/coreboot/+/52854 Tested-by: build bot (Jenkins) Reviewed-by: Yu-Ping Wu --- src/soc/mediatek/mt8173/include/soc/spi.h | 34 ++++++++----------------------- 1 file changed, 9 insertions(+), 25 deletions(-) (limited to 'src/soc/mediatek/mt8173/include') diff --git a/src/soc/mediatek/mt8173/include/soc/spi.h b/src/soc/mediatek/mt8173/include/soc/spi.h index 47da0f80cd..b267aa0d92 100644 --- a/src/soc/mediatek/mt8173/include/soc/spi.h +++ b/src/soc/mediatek/mt8173/include/soc/spi.h @@ -7,32 +7,16 @@ #define SPI_BUS_NUMBER 1 -/* SPI peripheral register map. */ -typedef struct mtk_spi_regs { - uint32_t spi_cfg0_reg; - uint32_t spi_cfg1_reg; - uint32_t spi_tx_src_reg; - uint32_t spi_rx_dst_reg; - uint32_t spi_tx_data_reg; - uint32_t spi_rx_data_reg; - uint32_t spi_cmd_reg; - uint32_t spi_status0_reg; - uint32_t spi_status1_reg; - uint32_t spi_pad_macro_sel_reg; -} mtk_spi_regs; +#define GET_SCK_REG(x) x->spi_cfg0_reg -check_member(mtk_spi_regs, spi_pad_macro_sel_reg, 0x24); +DEFINE_BITFIELD(SPI_CFG_SCK_HIGH, 7, 0) +DEFINE_BITFIELD(SPI_CFG_SCK_LOW, 15, 8) +DEFINE_BITFIELD(SPI_CFG_CS_HOLD, 23, 16) +DEFINE_BITFIELD(SPI_CFG_CS_SETUP, 31, 24) -enum { - SPI_CFG0_SCK_HIGH_SHIFT = 0, - SPI_CFG0_SCK_LOW_SHIFT = 8, - SPI_CFG0_CS_HOLD_SHIFT = 16, - SPI_CFG0_CS_SETUP_SHIFT = 24, -}; - -enum { - SPI_CFG1_TICK_DLY_SHIFT = 30, - SPI_CFG1_TICK_DLY_MASK = 0x3 << SPI_CFG1_TICK_DLY_SHIFT, -}; +DEFINE_BITFIELD(SPI_CFG1_CS_IDLE, 7, 0) +DEFINE_BITFIELD(SPI_CFG1_PACKET_LOOP, 15, 8) +DEFINE_BITFIELD(SPI_CFG1_PACKET_LENGTH, 28, 16) +DEFINE_BITFIELD(SPI_CFG1_TICK_DLY, 31, 29) #endif -- cgit v1.2.3