From 302dddf0f48acce1c00ae04606b0bf56c7da3f9d Mon Sep 17 00:00:00 2001 From: Hung-Te Lin Date: Thu, 8 Aug 2019 06:28:43 +0800 Subject: soc/mediatek: dsi: Refactor MIPI TX configuration The only platform-specific difference in mtk_dsi_phy_clk_setting is how to configure MIPI TX because those registers (and logic) are quite different across different SOCs. The calculation of data rate is actually the same so we should isolate it and move to common, and rename mtk_dsi_phy_clk_setting to a better name as mtk_dsi_configure_mipi_tx. BUG=b:80501386,b:117254947 TEST=make -j # board = oak and boots Change-Id: I894dc2c4c053267debf5a58313b2bb489bcf5f3a Signed-off-by: Hung-Te Lin Reviewed-on: https://review.coreboot.org/c/coreboot/+/34784 Tested-by: build bot (Jenkins) Reviewed-by: Julius Werner --- src/soc/mediatek/mt8173/include/soc/dsi.h | 5 +++++ 1 file changed, 5 insertions(+) (limited to 'src/soc/mediatek/mt8173/include') diff --git a/src/soc/mediatek/mt8173/include/soc/dsi.h b/src/soc/mediatek/mt8173/include/soc/dsi.h index f7c622745d..99c51e62ff 100644 --- a/src/soc/mediatek/mt8173/include/soc/dsi.h +++ b/src/soc/mediatek/mt8173/include/soc/dsi.h @@ -18,6 +18,11 @@ #include +/* DSI features */ +#define MTK_DSI_MIPI_RATIO_NUMERATOR 102 +#define MTK_DSI_MIPI_RATIO_DENOMINATOR 100 +#define MTK_DSI_DATA_RATE_MIN_MHZ 50 + /* MIPITX is SOC specific and cannot live in common. */ /* MIPITX_REG */ -- cgit v1.2.3