From 3a065f1a76feb4f23af6708caef5f912292610fd Mon Sep 17 00:00:00 2001 From: Chuanjia Liu Date: Mon, 26 Nov 2018 14:20:09 +0800 Subject: mediatek: Share GPIO external interrupts (EINT) code among similar SoCs Refactor GPIO EINT code which can be reused among similar SoCs. BUG=b:80501386 BRANCH=none TEST=emerge-elm coreboot; emerge-kukui coreboot Change-Id: Ib01b43cf1aa4082d7d968fe1ef82f75e8cf05b8b Signed-off-by: Chuanjia Liu Reviewed-on: https://review.coreboot.org/c/29837 Tested-by: build bot (Jenkins) Reviewed-by: Julius Werner --- src/soc/mediatek/mt8173/gpio.c | 58 ------------------------------------------ 1 file changed, 58 deletions(-) (limited to 'src/soc/mediatek/mt8173/gpio.c') diff --git a/src/soc/mediatek/mt8173/gpio.c b/src/soc/mediatek/mt8173/gpio.c index 518df851f1..259ac53fbf 100644 --- a/src/soc/mediatek/mt8173/gpio.c +++ b/src/soc/mediatek/mt8173/gpio.c @@ -19,7 +19,6 @@ enum { MAX_GPIO_NUMBER = 134, - MAX_EINT_REG_BITS = 32, }; static void pos_bit_calc(gpio_t gpio, u32 *pos, u32 *bit) @@ -28,12 +27,6 @@ static void pos_bit_calc(gpio_t gpio, u32 *pos, u32 *bit) *bit = gpio.id % MAX_GPIO_REG_BITS; } -static void pos_bit_calc_for_eint(gpio_t gpio, u32 *pos, u32 *bit) -{ - *pos = gpio.id / MAX_EINT_REG_BITS; - *bit = gpio.id % MAX_EINT_REG_BITS; -} - void gpio_set_pull(gpio_t gpio, enum pull_enable enable, enum pull_select select) { @@ -63,54 +56,3 @@ void gpio_set_pull(gpio_t gpio, enum pull_enable enable, } write16(en_reg, 1L << bit); } - -int gpio_eint_poll(gpio_t gpio) -{ - u32 pos; - u32 bit; - u32 status; - - pos_bit_calc_for_eint(gpio, &pos, &bit); - - status = (read32(&mt8173_eint->sta.regs[pos]) >> bit) & 0x1; - - if (status) - write32(&mt8173_eint->ack.regs[pos], 1 << bit); - - return status; -} - -void gpio_eint_configure(gpio_t gpio, enum gpio_irq_type type) -{ - u32 pos; - u32 bit, mask; - - pos_bit_calc_for_eint(gpio, &pos, &bit); - mask = 1 << bit; - - /* Make it an input first. */ - gpio_input_pullup(gpio); - - write32(&mt8173_eint->d0en[pos], mask); - - switch (type) { - case IRQ_TYPE_EDGE_FALLING: - write32(&mt8173_eint->sens_clr.regs[pos], mask); - write32(&mt8173_eint->pol_clr.regs[pos], mask); - break; - case IRQ_TYPE_EDGE_RISING: - write32(&mt8173_eint->sens_clr.regs[pos], mask); - write32(&mt8173_eint->pol_set.regs[pos], mask); - break; - case IRQ_TYPE_LEVEL_LOW: - write32(&mt8173_eint->sens_set.regs[pos], mask); - write32(&mt8173_eint->pol_clr.regs[pos], mask); - break; - case IRQ_TYPE_LEVEL_HIGH: - write32(&mt8173_eint->sens_set.regs[pos], mask); - write32(&mt8173_eint->pol_set.regs[pos], mask); - break; - } - - write32(&mt8173_eint->mask_clr.regs[pos], mask); -} -- cgit v1.2.3