From 0423a2bd1a710c21c741a909abead82956d8cbd6 Mon Sep 17 00:00:00 2001 From: Tristan Shieh Date: Tue, 12 Jun 2018 15:04:43 +0800 Subject: mediatek: Share mtcmos code among similar SOCs Refactor mtcmos code which will be reused among similar SOCs. BUG=b:80501386 BRANCH=none TEST=Boots correctly on Elm Change-Id: Ibfd0a90f6eba3ed2e74a3fd54279c7645aa41774 Signed-off-by: Tristan Shieh Reviewed-on: https://review.coreboot.org/27028 Tested-by: build bot (Jenkins) Reviewed-by: Paul Kocialkowski Reviewed-by: Hung-Te Lin Reviewed-by: Julius Werner --- src/soc/mediatek/mt8173/dramc_pi_basic_api.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) (limited to 'src/soc/mediatek/mt8173/dramc_pi_basic_api.c') diff --git a/src/soc/mediatek/mt8173/dramc_pi_basic_api.c b/src/soc/mediatek/mt8173/dramc_pi_basic_api.c index e471b4f312..cb6cc2c2e3 100644 --- a/src/soc/mediatek/mt8173/dramc_pi_basic_api.c +++ b/src/soc/mediatek/mt8173/dramc_pi_basic_api.c @@ -381,15 +381,15 @@ void mem_pll_init(const struct mt8173_sdram_params *sdram_params) } /* mempll new power-on */ - write32(&mt8173_spm->poweron_config_set, 0x1 << 0 | + write32(&mtk_spm->poweron_config_set, 0x1 << 0 | SPM_PROJECT_CODE << 16); /* request mempll reset/pdn mode */ - setbits_le32(&mt8173_spm->power_on_val0, 0x1 << 27); + setbits_le32(&mtk_spm->power_on_val0, 0x1 << 27); udelay(2); /* unrequest mempll reset/pdn mode and wait settle */ - clrbits_le32(&mt8173_spm->power_on_val0, 0x1 << 27); + clrbits_le32(&mtk_spm->power_on_val0, 0x1 << 27); udelay(31); /* PLL ready */ -- cgit v1.2.3