From ebf8a41b057ac34e63a99de7b5c0feaff5683b64 Mon Sep 17 00:00:00 2001 From: Tim Crawford Date: Fri, 6 Aug 2021 16:17:28 -0600 Subject: soc/intel/tgl: Hook up ucode for TGL-U and TGL-R Hook up microcode from 3rdparty repo for: - TGL-U: 06-8c-01 (CPUID signature: 0x806c1) - TGL-R: 06-8c-02 (CPUID signature: 0x806c2) Verified microcode blob was found in CBFS on system76/darp7 (TGL-U). CBFS: Found 'cpu_microcode_blob.bin' @0x103c0 size 0x31c00 in mcache @0x76c2d0ac microcode: sig=0x806c1 pf=0x80 revision=0x88 coreboot reports the correct revision for the microcode. Change-Id: I210c0133dad7ade63b9f7177aaa9a69b019469af Signed-off-by: Tim Crawford Reviewed-on: https://review.coreboot.org/c/coreboot/+/56862 Reviewed-by: Tim Wawrzynczak Reviewed-by: Felix Singer Reviewed-by: Nick Vaccaro Tested-by: build bot (Jenkins) --- src/soc/intel/tigerlake/Kconfig | 1 - src/soc/intel/tigerlake/Makefile.inc | 3 +++ 2 files changed, 3 insertions(+), 1 deletion(-) (limited to 'src/soc/intel') diff --git a/src/soc/intel/tigerlake/Kconfig b/src/soc/intel/tigerlake/Kconfig index d506800fdc..901570336f 100644 --- a/src/soc/intel/tigerlake/Kconfig +++ b/src/soc/intel/tigerlake/Kconfig @@ -34,7 +34,6 @@ config CPU_SPECIFIC_OPTIONS select MP_SERVICES_PPI_V1 select MRC_SETTINGS_PROTECT select PARALLEL_MP_AP_WORK - select MICROCODE_BLOB_UNDISCLOSED select PLATFORM_USES_FSP2_2 select REG_SCRIPT select PMC_GLOBAL_RESET_ENABLE_LOCK diff --git a/src/soc/intel/tigerlake/Makefile.inc b/src/soc/intel/tigerlake/Makefile.inc index 39a45f9d6f..22714e1166 100644 --- a/src/soc/intel/tigerlake/Makefile.inc +++ b/src/soc/intel/tigerlake/Makefile.inc @@ -58,4 +58,7 @@ verstage-y += gpio.c CPPFLAGS_common += -I$(src)/soc/intel/tigerlake CPPFLAGS_common += -I$(src)/soc/intel/tigerlake/include +cpu_microcode_bins += 3rdparty/intel-microcode/intel-ucode/06-8c-01 +cpu_microcode_bins += 3rdparty/intel-microcode/intel-ucode/06-8c-02 + endif -- cgit v1.2.3