From ea198585628ea58a90d85957b7b87b8fd46b0176 Mon Sep 17 00:00:00 2001 From: Martin Roth Date: Thu, 18 Jan 2024 12:37:22 -0700 Subject: soc/intel: Rename Makefiles from .inc to .mk MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit The .inc suffix is confusing to various tools as it's not specific to Makefiles. This means that editors don't recognize the files, and don't open them with highlighting and any other specific editor functionality. This issue is also seen in the release notes generation script where Makefiles get renamed before running cloc. Signed-off-by: Martin Roth Change-Id: Ib479b93b7d0b2e790d0495b6a6b4b4298a515d9a Reviewed-on: https://review.coreboot.org/c/coreboot/+/80073 Reviewed-by: Arthur Heymans Reviewed-by: Michael Niewöhner Reviewed-by: Felix Singer Reviewed-by: Maximilian Brune Tested-by: build bot (Jenkins) --- src/soc/intel/Makefile.inc | 57 ------ src/soc/intel/Makefile.mk | 57 ++++++ src/soc/intel/alderlake/Makefile.inc | 143 -------------- src/soc/intel/alderlake/Makefile.mk | 143 ++++++++++++++ src/soc/intel/alderlake/romstage/Makefile.inc | 8 - src/soc/intel/alderlake/romstage/Makefile.mk | 8 + src/soc/intel/apollolake/Makefile.inc | 208 --------------------- src/soc/intel/apollolake/Makefile.mk | 208 +++++++++++++++++++++ src/soc/intel/baytrail/Makefile.inc | 87 --------- src/soc/intel/baytrail/Makefile.mk | 87 +++++++++ src/soc/intel/baytrail/romstage/Makefile.inc | 6 - src/soc/intel/baytrail/romstage/Makefile.mk | 6 + src/soc/intel/braswell/Makefile.inc | 78 -------- src/soc/intel/braswell/Makefile.mk | 78 ++++++++ src/soc/intel/braswell/romstage/Makefile.inc | 3 - src/soc/intel/braswell/romstage/Makefile.mk | 3 + src/soc/intel/broadwell/Makefile.inc | 40 ---- src/soc/intel/broadwell/Makefile.mk | 40 ++++ src/soc/intel/broadwell/pch/Makefile.inc | 45 ----- src/soc/intel/broadwell/pch/Makefile.mk | 45 +++++ src/soc/intel/cannonlake/Makefile.inc | 156 ---------------- src/soc/intel/cannonlake/Makefile.mk | 156 ++++++++++++++++ src/soc/intel/cannonlake/cnl_memcfg_init.c | 2 +- src/soc/intel/cannonlake/romstage/Makefile.inc | 6 - src/soc/intel/cannonlake/romstage/Makefile.mk | 6 + src/soc/intel/common/Makefile.inc | 81 -------- src/soc/intel/common/Makefile.mk | 81 ++++++++ src/soc/intel/common/basecode/Makefile.inc | 8 - src/soc/intel/common/basecode/Makefile.mk | 8 + src/soc/intel/common/basecode/debug/Makefile.inc | 3 - src/soc/intel/common/basecode/debug/Makefile.mk | 3 + src/soc/intel/common/basecode/ramtop/Makefile.inc | 2 - src/soc/intel/common/basecode/ramtop/Makefile.mk | 2 + src/soc/intel/common/block/Makefile.inc | 8 - src/soc/intel/common/block/Makefile.mk | 8 + src/soc/intel/common/block/acpi/Makefile.inc | 9 - src/soc/intel/common/block/acpi/Makefile.mk | 9 + src/soc/intel/common/block/chip/Makefile.inc | 11 -- src/soc/intel/common/block/chip/Makefile.mk | 11 ++ src/soc/intel/common/block/cnvi/Makefile.inc | 2 - src/soc/intel/common/block/cnvi/Makefile.mk | 2 + src/soc/intel/common/block/cpu/Makefile.inc | 20 -- src/soc/intel/common/block/cpu/Makefile.mk | 20 ++ src/soc/intel/common/block/crashlog/Makefile.inc | 2 - src/soc/intel/common/block/crashlog/Makefile.mk | 2 + src/soc/intel/common/block/cse/Makefile.inc | 125 ------------- src/soc/intel/common/block/cse/Makefile.mk | 125 +++++++++++++ src/soc/intel/common/block/dsp/Makefile.inc | 2 - src/soc/intel/common/block/dsp/Makefile.mk | 2 + src/soc/intel/common/block/dtt/Makefile.inc | 2 - src/soc/intel/common/block/dtt/Makefile.mk | 2 + src/soc/intel/common/block/fast_spi/Makefile.inc | 104 ----------- src/soc/intel/common/block/fast_spi/Makefile.mk | 104 +++++++++++ src/soc/intel/common/block/gpio/Makefile.inc | 8 - src/soc/intel/common/block/gpio/Makefile.mk | 8 + src/soc/intel/common/block/gpmr/Makefile.inc | 8 - src/soc/intel/common/block/gpmr/Makefile.mk | 8 + src/soc/intel/common/block/graphics/Makefile.inc | 3 - src/soc/intel/common/block/graphics/Makefile.mk | 3 + src/soc/intel/common/block/gspi/Makefile.inc | 6 - src/soc/intel/common/block/gspi/Makefile.mk | 6 + src/soc/intel/common/block/hda/Makefile.inc | 2 - src/soc/intel/common/block/hda/Makefile.mk | 2 + src/soc/intel/common/block/i2c/Makefile.inc | 10 - src/soc/intel/common/block/i2c/Makefile.mk | 10 + src/soc/intel/common/block/ioc/Makefile.inc | 4 - src/soc/intel/common/block/ioc/Makefile.mk | 4 + src/soc/intel/common/block/ipu/Makefile.inc | 2 - src/soc/intel/common/block/ipu/Makefile.mk | 2 + src/soc/intel/common/block/irq/Makefile.inc | 2 - src/soc/intel/common/block/irq/Makefile.mk | 2 + src/soc/intel/common/block/itss/Makefile.inc | 4 - src/soc/intel/common/block/itss/Makefile.mk | 4 + src/soc/intel/common/block/lpc/Makefile.inc | 7 - src/soc/intel/common/block/lpc/Makefile.mk | 7 + src/soc/intel/common/block/lpss/Makefile.inc | 7 - src/soc/intel/common/block/lpss/Makefile.mk | 7 + src/soc/intel/common/block/memory/Makefile.inc | 2 - src/soc/intel/common/block/memory/Makefile.mk | 2 + src/soc/intel/common/block/oc_wdt/Makefile.inc | 4 - src/soc/intel/common/block/oc_wdt/Makefile.mk | 4 + src/soc/intel/common/block/p2sb/Makefile.inc | 17 -- src/soc/intel/common/block/p2sb/Makefile.mk | 17 ++ src/soc/intel/common/block/pcie/Makefile.inc | 8 - src/soc/intel/common/block/pcie/Makefile.mk | 8 + src/soc/intel/common/block/pcie/rtd3/Makefile.inc | 2 - src/soc/intel/common/block/pcie/rtd3/Makefile.mk | 2 + src/soc/intel/common/block/pcr/Makefile.inc | 6 - src/soc/intel/common/block/pcr/Makefile.mk | 6 + src/soc/intel/common/block/pmc/Makefile.inc | 11 -- src/soc/intel/common/block/pmc/Makefile.mk | 11 ++ .../intel/common/block/power_limit/Makefile.inc | 2 - src/soc/intel/common/block/power_limit/Makefile.mk | 2 + src/soc/intel/common/block/rtc/Makefile.inc | 4 - src/soc/intel/common/block/rtc/Makefile.mk | 4 + src/soc/intel/common/block/sata/Makefile.inc | 2 - src/soc/intel/common/block/sata/Makefile.mk | 2 + src/soc/intel/common/block/scs/Makefile.inc | 6 - src/soc/intel/common/block/scs/Makefile.mk | 6 + src/soc/intel/common/block/sgx/Makefile.inc | 2 - src/soc/intel/common/block/sgx/Makefile.mk | 2 + src/soc/intel/common/block/smbus/Makefile.inc | 15 -- src/soc/intel/common/block/smbus/Makefile.mk | 15 ++ src/soc/intel/common/block/smm/Makefile.inc | 7 - src/soc/intel/common/block/smm/Makefile.mk | 7 + src/soc/intel/common/block/spi/Makefile.inc | 14 -- src/soc/intel/common/block/spi/Makefile.mk | 14 ++ src/soc/intel/common/block/sram/Makefile.inc | 2 - src/soc/intel/common/block/sram/Makefile.mk | 2 + .../intel/common/block/systemagent/Makefile.inc | 9 - src/soc/intel/common/block/systemagent/Makefile.mk | 9 + src/soc/intel/common/block/tcss/Makefile.inc | 2 - src/soc/intel/common/block/tcss/Makefile.mk | 2 + src/soc/intel/common/block/thermal/Makefile.inc | 6 - src/soc/intel/common/block/thermal/Makefile.mk | 6 + src/soc/intel/common/block/timer/Makefile.inc | 7 - src/soc/intel/common/block/timer/Makefile.mk | 7 + src/soc/intel/common/block/tracehub/Makefile.inc | 2 - src/soc/intel/common/block/tracehub/Makefile.mk | 2 + src/soc/intel/common/block/uart/Makefile.inc | 7 - src/soc/intel/common/block/uart/Makefile.mk | 7 + src/soc/intel/common/block/usb4/Makefile.inc | 4 - src/soc/intel/common/block/usb4/Makefile.mk | 4 + src/soc/intel/common/block/vtd/Makefile.inc | 8 - src/soc/intel/common/block/vtd/Makefile.mk | 8 + src/soc/intel/common/block/xdci/Makefile.inc | 2 - src/soc/intel/common/block/xdci/Makefile.mk | 2 + src/soc/intel/common/block/xhci/Makefile.inc | 6 - src/soc/intel/common/block/xhci/Makefile.mk | 6 + src/soc/intel/common/pch/Makefile.inc | 6 - src/soc/intel/common/pch/Makefile.mk | 6 + src/soc/intel/common/pch/lockdown/Makefile.inc | 2 - src/soc/intel/common/pch/lockdown/Makefile.mk | 2 + src/soc/intel/denverton_ns/Makefile.inc | 75 -------- src/soc/intel/denverton_ns/Makefile.mk | 75 ++++++++ src/soc/intel/elkhartlake/Makefile.inc | 71 ------- src/soc/intel/elkhartlake/Makefile.mk | 71 +++++++ src/soc/intel/elkhartlake/romstage/Makefile.inc | 6 - src/soc/intel/elkhartlake/romstage/Makefile.mk | 6 + src/soc/intel/jasperlake/Makefile.inc | 59 ------ src/soc/intel/jasperlake/Makefile.mk | 59 ++++++ src/soc/intel/jasperlake/romstage/Makefile.inc | 6 - src/soc/intel/jasperlake/romstage/Makefile.mk | 6 + src/soc/intel/meteorlake/Makefile.inc | 64 ------- src/soc/intel/meteorlake/Makefile.mk | 64 +++++++ src/soc/intel/meteorlake/romstage/Makefile.inc | 6 - src/soc/intel/meteorlake/romstage/Makefile.mk | 6 + src/soc/intel/skylake/Makefile.inc | 116 ------------ src/soc/intel/skylake/Makefile.mk | 116 ++++++++++++ src/soc/intel/skylake/nhlt/Makefile.inc | 98 ---------- src/soc/intel/skylake/nhlt/Makefile.mk | 98 ++++++++++ src/soc/intel/skylake/romstage/Makefile.inc | 5 - src/soc/intel/skylake/romstage/Makefile.mk | 5 + src/soc/intel/tigerlake/Makefile.inc | 77 -------- src/soc/intel/tigerlake/Makefile.mk | 77 ++++++++ src/soc/intel/tigerlake/romstage/Makefile.inc | 6 - src/soc/intel/tigerlake/romstage/Makefile.mk | 6 + src/soc/intel/xeon_sp/Makefile.inc | 26 --- src/soc/intel/xeon_sp/Makefile.mk | 26 +++ src/soc/intel/xeon_sp/cpx/Makefile.inc | 22 --- src/soc/intel/xeon_sp/cpx/Makefile.mk | 22 +++ src/soc/intel/xeon_sp/ebg/Makefile.inc | 7 - src/soc/intel/xeon_sp/ebg/Makefile.mk | 7 + src/soc/intel/xeon_sp/lbg/Makefile.inc | 7 - src/soc/intel/xeon_sp/lbg/Makefile.mk | 7 + src/soc/intel/xeon_sp/ras/Makefile.inc | 3 - src/soc/intel/xeon_sp/ras/Makefile.mk | 3 + src/soc/intel/xeon_sp/skx/Makefile.inc | 30 --- src/soc/intel/xeon_sp/skx/Makefile.mk | 30 +++ src/soc/intel/xeon_sp/spr/Makefile.inc | 22 --- src/soc/intel/xeon_sp/spr/Makefile.mk | 22 +++ 171 files changed, 2151 insertions(+), 2151 deletions(-) delete mode 100644 src/soc/intel/Makefile.inc create mode 100644 src/soc/intel/Makefile.mk delete mode 100644 src/soc/intel/alderlake/Makefile.inc create mode 100644 src/soc/intel/alderlake/Makefile.mk delete mode 100644 src/soc/intel/alderlake/romstage/Makefile.inc create mode 100644 src/soc/intel/alderlake/romstage/Makefile.mk delete mode 100644 src/soc/intel/apollolake/Makefile.inc create mode 100644 src/soc/intel/apollolake/Makefile.mk delete mode 100644 src/soc/intel/baytrail/Makefile.inc create mode 100644 src/soc/intel/baytrail/Makefile.mk delete mode 100644 src/soc/intel/baytrail/romstage/Makefile.inc create mode 100644 src/soc/intel/baytrail/romstage/Makefile.mk delete mode 100644 src/soc/intel/braswell/Makefile.inc create mode 100644 src/soc/intel/braswell/Makefile.mk delete mode 100644 src/soc/intel/braswell/romstage/Makefile.inc create mode 100644 src/soc/intel/braswell/romstage/Makefile.mk delete mode 100644 src/soc/intel/broadwell/Makefile.inc create mode 100644 src/soc/intel/broadwell/Makefile.mk delete mode 100644 src/soc/intel/broadwell/pch/Makefile.inc create mode 100644 src/soc/intel/broadwell/pch/Makefile.mk delete mode 100644 src/soc/intel/cannonlake/Makefile.inc create mode 100644 src/soc/intel/cannonlake/Makefile.mk delete mode 100644 src/soc/intel/cannonlake/romstage/Makefile.inc create mode 100644 src/soc/intel/cannonlake/romstage/Makefile.mk delete mode 100644 src/soc/intel/common/Makefile.inc create mode 100644 src/soc/intel/common/Makefile.mk delete mode 100644 src/soc/intel/common/basecode/Makefile.inc create mode 100644 src/soc/intel/common/basecode/Makefile.mk delete mode 100644 src/soc/intel/common/basecode/debug/Makefile.inc create mode 100644 src/soc/intel/common/basecode/debug/Makefile.mk delete mode 100644 src/soc/intel/common/basecode/ramtop/Makefile.inc create mode 100644 src/soc/intel/common/basecode/ramtop/Makefile.mk delete mode 100644 src/soc/intel/common/block/Makefile.inc create mode 100644 src/soc/intel/common/block/Makefile.mk delete mode 100644 src/soc/intel/common/block/acpi/Makefile.inc create mode 100644 src/soc/intel/common/block/acpi/Makefile.mk delete mode 100644 src/soc/intel/common/block/chip/Makefile.inc create mode 100644 src/soc/intel/common/block/chip/Makefile.mk delete mode 100644 src/soc/intel/common/block/cnvi/Makefile.inc create mode 100644 src/soc/intel/common/block/cnvi/Makefile.mk delete mode 100644 src/soc/intel/common/block/cpu/Makefile.inc create mode 100644 src/soc/intel/common/block/cpu/Makefile.mk delete mode 100644 src/soc/intel/common/block/crashlog/Makefile.inc create mode 100644 src/soc/intel/common/block/crashlog/Makefile.mk delete mode 100644 src/soc/intel/common/block/cse/Makefile.inc create mode 100644 src/soc/intel/common/block/cse/Makefile.mk delete mode 100644 src/soc/intel/common/block/dsp/Makefile.inc create mode 100644 src/soc/intel/common/block/dsp/Makefile.mk delete mode 100644 src/soc/intel/common/block/dtt/Makefile.inc create mode 100644 src/soc/intel/common/block/dtt/Makefile.mk delete mode 100644 src/soc/intel/common/block/fast_spi/Makefile.inc create mode 100644 src/soc/intel/common/block/fast_spi/Makefile.mk delete mode 100644 src/soc/intel/common/block/gpio/Makefile.inc create mode 100644 src/soc/intel/common/block/gpio/Makefile.mk delete mode 100644 src/soc/intel/common/block/gpmr/Makefile.inc create mode 100644 src/soc/intel/common/block/gpmr/Makefile.mk delete mode 100644 src/soc/intel/common/block/graphics/Makefile.inc create mode 100644 src/soc/intel/common/block/graphics/Makefile.mk delete mode 100644 src/soc/intel/common/block/gspi/Makefile.inc create mode 100644 src/soc/intel/common/block/gspi/Makefile.mk delete mode 100644 src/soc/intel/common/block/hda/Makefile.inc create mode 100644 src/soc/intel/common/block/hda/Makefile.mk delete mode 100644 src/soc/intel/common/block/i2c/Makefile.inc create mode 100644 src/soc/intel/common/block/i2c/Makefile.mk delete mode 100644 src/soc/intel/common/block/ioc/Makefile.inc create mode 100644 src/soc/intel/common/block/ioc/Makefile.mk delete mode 100644 src/soc/intel/common/block/ipu/Makefile.inc create mode 100644 src/soc/intel/common/block/ipu/Makefile.mk delete mode 100644 src/soc/intel/common/block/irq/Makefile.inc create mode 100644 src/soc/intel/common/block/irq/Makefile.mk delete mode 100644 src/soc/intel/common/block/itss/Makefile.inc create mode 100644 src/soc/intel/common/block/itss/Makefile.mk delete mode 100644 src/soc/intel/common/block/lpc/Makefile.inc create mode 100644 src/soc/intel/common/block/lpc/Makefile.mk delete mode 100644 src/soc/intel/common/block/lpss/Makefile.inc create mode 100644 src/soc/intel/common/block/lpss/Makefile.mk delete mode 100644 src/soc/intel/common/block/memory/Makefile.inc create mode 100644 src/soc/intel/common/block/memory/Makefile.mk delete mode 100644 src/soc/intel/common/block/oc_wdt/Makefile.inc create mode 100644 src/soc/intel/common/block/oc_wdt/Makefile.mk delete mode 100644 src/soc/intel/common/block/p2sb/Makefile.inc create mode 100644 src/soc/intel/common/block/p2sb/Makefile.mk delete mode 100644 src/soc/intel/common/block/pcie/Makefile.inc create mode 100644 src/soc/intel/common/block/pcie/Makefile.mk delete mode 100644 src/soc/intel/common/block/pcie/rtd3/Makefile.inc create mode 100644 src/soc/intel/common/block/pcie/rtd3/Makefile.mk delete mode 100644 src/soc/intel/common/block/pcr/Makefile.inc create mode 100644 src/soc/intel/common/block/pcr/Makefile.mk delete mode 100644 src/soc/intel/common/block/pmc/Makefile.inc create mode 100644 src/soc/intel/common/block/pmc/Makefile.mk delete mode 100644 src/soc/intel/common/block/power_limit/Makefile.inc create mode 100644 src/soc/intel/common/block/power_limit/Makefile.mk delete mode 100644 src/soc/intel/common/block/rtc/Makefile.inc create mode 100644 src/soc/intel/common/block/rtc/Makefile.mk delete mode 100644 src/soc/intel/common/block/sata/Makefile.inc create mode 100644 src/soc/intel/common/block/sata/Makefile.mk delete mode 100644 src/soc/intel/common/block/scs/Makefile.inc create mode 100644 src/soc/intel/common/block/scs/Makefile.mk delete mode 100644 src/soc/intel/common/block/sgx/Makefile.inc create mode 100644 src/soc/intel/common/block/sgx/Makefile.mk delete mode 100644 src/soc/intel/common/block/smbus/Makefile.inc create mode 100644 src/soc/intel/common/block/smbus/Makefile.mk delete mode 100644 src/soc/intel/common/block/smm/Makefile.inc create mode 100644 src/soc/intel/common/block/smm/Makefile.mk delete mode 100644 src/soc/intel/common/block/spi/Makefile.inc create mode 100644 src/soc/intel/common/block/spi/Makefile.mk delete mode 100644 src/soc/intel/common/block/sram/Makefile.inc create mode 100644 src/soc/intel/common/block/sram/Makefile.mk delete mode 100644 src/soc/intel/common/block/systemagent/Makefile.inc create mode 100644 src/soc/intel/common/block/systemagent/Makefile.mk delete mode 100644 src/soc/intel/common/block/tcss/Makefile.inc create mode 100644 src/soc/intel/common/block/tcss/Makefile.mk delete mode 100644 src/soc/intel/common/block/thermal/Makefile.inc create mode 100644 src/soc/intel/common/block/thermal/Makefile.mk delete mode 100644 src/soc/intel/common/block/timer/Makefile.inc create mode 100644 src/soc/intel/common/block/timer/Makefile.mk delete mode 100644 src/soc/intel/common/block/tracehub/Makefile.inc create mode 100644 src/soc/intel/common/block/tracehub/Makefile.mk delete mode 100644 src/soc/intel/common/block/uart/Makefile.inc create mode 100644 src/soc/intel/common/block/uart/Makefile.mk delete mode 100644 src/soc/intel/common/block/usb4/Makefile.inc create mode 100644 src/soc/intel/common/block/usb4/Makefile.mk delete mode 100644 src/soc/intel/common/block/vtd/Makefile.inc create mode 100644 src/soc/intel/common/block/vtd/Makefile.mk delete mode 100644 src/soc/intel/common/block/xdci/Makefile.inc create mode 100644 src/soc/intel/common/block/xdci/Makefile.mk delete mode 100644 src/soc/intel/common/block/xhci/Makefile.inc create mode 100644 src/soc/intel/common/block/xhci/Makefile.mk delete mode 100644 src/soc/intel/common/pch/Makefile.inc create mode 100644 src/soc/intel/common/pch/Makefile.mk delete mode 100644 src/soc/intel/common/pch/lockdown/Makefile.inc create mode 100644 src/soc/intel/common/pch/lockdown/Makefile.mk delete mode 100644 src/soc/intel/denverton_ns/Makefile.inc create mode 100644 src/soc/intel/denverton_ns/Makefile.mk delete mode 100644 src/soc/intel/elkhartlake/Makefile.inc create mode 100644 src/soc/intel/elkhartlake/Makefile.mk delete mode 100644 src/soc/intel/elkhartlake/romstage/Makefile.inc create mode 100644 src/soc/intel/elkhartlake/romstage/Makefile.mk delete mode 100644 src/soc/intel/jasperlake/Makefile.inc create mode 100644 src/soc/intel/jasperlake/Makefile.mk delete mode 100644 src/soc/intel/jasperlake/romstage/Makefile.inc create mode 100644 src/soc/intel/jasperlake/romstage/Makefile.mk delete mode 100644 src/soc/intel/meteorlake/Makefile.inc create mode 100644 src/soc/intel/meteorlake/Makefile.mk delete mode 100644 src/soc/intel/meteorlake/romstage/Makefile.inc create mode 100644 src/soc/intel/meteorlake/romstage/Makefile.mk delete mode 100644 src/soc/intel/skylake/Makefile.inc create mode 100644 src/soc/intel/skylake/Makefile.mk delete mode 100644 src/soc/intel/skylake/nhlt/Makefile.inc create mode 100644 src/soc/intel/skylake/nhlt/Makefile.mk delete mode 100644 src/soc/intel/skylake/romstage/Makefile.inc create mode 100644 src/soc/intel/skylake/romstage/Makefile.mk delete mode 100644 src/soc/intel/tigerlake/Makefile.inc create mode 100644 src/soc/intel/tigerlake/Makefile.mk delete mode 100644 src/soc/intel/tigerlake/romstage/Makefile.inc create mode 100644 src/soc/intel/tigerlake/romstage/Makefile.mk delete mode 100644 src/soc/intel/xeon_sp/Makefile.inc create mode 100644 src/soc/intel/xeon_sp/Makefile.mk delete mode 100644 src/soc/intel/xeon_sp/cpx/Makefile.inc create mode 100644 src/soc/intel/xeon_sp/cpx/Makefile.mk delete mode 100644 src/soc/intel/xeon_sp/ebg/Makefile.inc create mode 100644 src/soc/intel/xeon_sp/ebg/Makefile.mk delete mode 100644 src/soc/intel/xeon_sp/lbg/Makefile.inc create mode 100644 src/soc/intel/xeon_sp/lbg/Makefile.mk delete mode 100644 src/soc/intel/xeon_sp/ras/Makefile.inc create mode 100644 src/soc/intel/xeon_sp/ras/Makefile.mk delete mode 100644 src/soc/intel/xeon_sp/skx/Makefile.inc create mode 100644 src/soc/intel/xeon_sp/skx/Makefile.mk delete mode 100644 src/soc/intel/xeon_sp/spr/Makefile.inc create mode 100644 src/soc/intel/xeon_sp/spr/Makefile.mk (limited to 'src/soc/intel') diff --git a/src/soc/intel/Makefile.inc b/src/soc/intel/Makefile.inc deleted file mode 100644 index b50fca20df..0000000000 --- a/src/soc/intel/Makefile.inc +++ /dev/null @@ -1,57 +0,0 @@ -## SPDX-License-Identifier: GPL-2.0-only -ifeq ($(CONFIG_STITCH_ME_BIN),y) - -objcse := $(obj)/cse -additional-dirs += $(objcse) - -define cse_input_path -$(call strip_quotes,$(CONFIG_CSE_COMPONENTS_PATH))/$(call strip_quotes,$(1)) -endef - -define cse_add_dummy -$(eval cse_$(1)_ingredients+=$(2)) -endef - -define cse_add_dummy_to_bp1_bp2 -$(call cse_add_dummy,bp1,$(1)) -$(call cse_add_dummy,bp2,$(1)) -endef - -define cse_add_file -$(eval cse_$(3)_ingredients+=$(4)) -$(eval file=$(2)) -$(eval $(4)-file=$(file)) -$(eval $(1)+=$(if $(filter $(file),$($(1))),,$(file))) -endef - -define cse_add_decomp -$(call cse_add_file,cse_decomp_files,$(objcse)/$(2),$(1),$(2)) -endef - -define cse_add_decomp_to_bp1_bp2 -$(call cse_add_decomp,bp1,$(1)) -$(call cse_add_decomp,bp2,$(1)) -endef - -# (Comment to help with greping for uses) -# -# This uses the following Kconfigs: -# CSE_PMCP_FILE -# CSE_IOMP_FILE -# CSE_TBTP_FILE -# CSE_NPHY_FILE -# CSE_PCHC_FILE -# CSE_IUNP_FILE -# CSE_OEMP_FILE -# -# For example `$(call cse_add_input_to_bp1_bp2,PMCP)` will process CONFIG_CSE_PMCP_FILE -define cse_add_input -$(call cse_add_file,cse_input_files,$(call cse_input_path,$(CONFIG_CSE_$(2)_FILE)),$(1),$(2)) -endef - -define cse_add_input_to_bp1_bp2 -$(call cse_add_input,bp1,$(1)) -$(call cse_add_input,bp2,$(1)) -endef - -endif diff --git a/src/soc/intel/Makefile.mk b/src/soc/intel/Makefile.mk new file mode 100644 index 0000000000..b50fca20df --- /dev/null +++ b/src/soc/intel/Makefile.mk @@ -0,0 +1,57 @@ +## SPDX-License-Identifier: GPL-2.0-only +ifeq ($(CONFIG_STITCH_ME_BIN),y) + +objcse := $(obj)/cse +additional-dirs += $(objcse) + +define cse_input_path +$(call strip_quotes,$(CONFIG_CSE_COMPONENTS_PATH))/$(call strip_quotes,$(1)) +endef + +define cse_add_dummy +$(eval cse_$(1)_ingredients+=$(2)) +endef + +define cse_add_dummy_to_bp1_bp2 +$(call cse_add_dummy,bp1,$(1)) +$(call cse_add_dummy,bp2,$(1)) +endef + +define cse_add_file +$(eval cse_$(3)_ingredients+=$(4)) +$(eval file=$(2)) +$(eval $(4)-file=$(file)) +$(eval $(1)+=$(if $(filter $(file),$($(1))),,$(file))) +endef + +define cse_add_decomp +$(call cse_add_file,cse_decomp_files,$(objcse)/$(2),$(1),$(2)) +endef + +define cse_add_decomp_to_bp1_bp2 +$(call cse_add_decomp,bp1,$(1)) +$(call cse_add_decomp,bp2,$(1)) +endef + +# (Comment to help with greping for uses) +# +# This uses the following Kconfigs: +# CSE_PMCP_FILE +# CSE_IOMP_FILE +# CSE_TBTP_FILE +# CSE_NPHY_FILE +# CSE_PCHC_FILE +# CSE_IUNP_FILE +# CSE_OEMP_FILE +# +# For example `$(call cse_add_input_to_bp1_bp2,PMCP)` will process CONFIG_CSE_PMCP_FILE +define cse_add_input +$(call cse_add_file,cse_input_files,$(call cse_input_path,$(CONFIG_CSE_$(2)_FILE)),$(1),$(2)) +endef + +define cse_add_input_to_bp1_bp2 +$(call cse_add_input,bp1,$(1)) +$(call cse_add_input,bp2,$(1)) +endef + +endif diff --git a/src/soc/intel/alderlake/Makefile.inc b/src/soc/intel/alderlake/Makefile.inc deleted file mode 100644 index 55fc83ea7c..0000000000 --- a/src/soc/intel/alderlake/Makefile.inc +++ /dev/null @@ -1,143 +0,0 @@ -## SPDX-License-Identifier: GPL-2.0-only -ifeq ($(CONFIG_SOC_INTEL_ALDERLAKE),y) -subdirs-y += romstage -subdirs-y += ../../../cpu/intel/microcode -subdirs-y += ../../../cpu/intel/turbo - -# all (bootblock, verstage, romstage, postcar, ramstage) -all-y += gspi.c -all-y += i2c.c -all-y += pmutil.c -all-y += spi.c -all-y += uart.c - -bootblock-y += bootblock/bootblock.c -bootblock-y += bootblock/pch.c -bootblock-y += bootblock/report_platform.c -bootblock-y += espi.c -bootblock-y += p2sb.c -bootblock-$(CONFIG_ALDERLAKE_CONFIGURE_DESCRIPTOR) += bootblock/update_descriptor.c - -romstage-$(CONFIG_SOC_INTEL_CSE_PRE_CPU_RESET_TELEMETRY) += cse_telemetry.c -romstage-y += espi.c -romstage-y += meminit.c -romstage-y += pcie_rp.c -romstage-y += reset.c - -ramstage-y += acpi.c -ramstage-y += chip.c -ramstage-y += cpu.c -ramstage-y += elog.c -ramstage-y += espi.c -ramstage-y += finalize.c -ramstage-y += fsp_params.c -ramstage-y += graphics.c -ramstage-y += hsphy.c -ramstage-y += lockdown.c -ramstage-y += p2sb.c -ramstage-y += pcie_rp.c -ramstage-y += pmc.c -ramstage-y += reset.c -ramstage-$(CONFIG_SOC_INTEL_ALDERLAKE_TCSS_USB4_SUPPORT) += retimer.c -ramstage-y += soundwire.c -ramstage-y += systemagent.c -ramstage-y += tcss.c -ramstage-y += vr_config.c -ramstage-y += xhci.c -ramstage-$(CONFIG_SOC_INTEL_CRASHLOG) += crashlog.c - -smm-y += elog.c -smm-y += p2sb.c -smm-y += pmutil.c -smm-y += smihandler.c -smm-y += uart.c -smm-y += xhci.c - -ifeq ($(CONFIG_SOC_INTEL_ALDERLAKE_PCH_S),y) -bootblock-y += gpio_pch_s.c -romstage-y += gpio_pch_s.c -ramstage-y += gpio_pch_s.c -smm-y += gpio_pch_s.c -verstage-y += gpio_pch_s.c -else -bootblock-y += gpio.c -romstage-y += gpio.c -ramstage-y += gpio.c -smm-y += gpio.c -verstage-y += gpio.c -endif - -CPPFLAGS_common += -I$(src)/soc/intel/alderlake -CPPFLAGS_common += -I$(src)/soc/intel/alderlake/include - -# Include the missing MemInfoHob.h from vendorcode -ifeq ($(CONFIG_SOC_INTEL_RAPTORLAKE_PCH_S)$(CONFIG_FSP_TYPE_IOT),yy) -CPPFLAGS_common += -I$(src)/vendorcode/intel/fsp/fsp2_0/iot/raptorlake_s -endif - -ifeq ($(CONFIG_SOC_INTEL_ALDERLAKE_PCH_S),y) -# 06-97-00, 06-97-01, 06-97-04 are ADL-S Engineering Samples -# 06-97-02 are ADL-S/HX Quality Samples but also ADL-HX Engineering Samples -# 06-b7-00 are RPL-S Engineering Samples -# ADL-S/HX C0/H0 and RPL-S C0/H0 -cpu_microcode_bins += 3rdparty/intel-microcode/intel-ucode/06-97-05 -# RPL-S/HX B0 -cpu_microcode_bins += 3rdparty/intel-microcode/intel-ucode/06-b7-01 -else ifeq ($(CONFIG_SOC_INTEL_ALDERLAKE_PCH_N),y) -cpu_microcode_bins += 3rdparty/intel-microcode/intel-ucode/06-be-00 -else -# 06-9a-00, 06-9a-01 are ADL-P/ADL-M Engineering Samples -# Missing 06-9a-02 ADL-P K0 -# ADL-P L0, ADL-P R0 and ADL-M R0 -cpu_microcode_bins += 3rdparty/intel-microcode/intel-ucode/06-9a-04 -# RPL-P/H J0, RPL-U Q0 -cpu_microcode_bins += 3rdparty/intel-microcode/intel-ucode/06-ba-02 -endif - -ifeq ($(CONFIG_STITCH_ME_BIN),y) - -$(eval $(call cse_add_dummy_to_bp1_bp2,DLMP)) -$(eval $(call cse_add_dummy_to_bp1_bp2,IFPP)) -$(eval $(call cse_add_dummy_to_bp1_bp2,SBDT)) -$(eval $(call cse_add_decomp_to_bp1_bp2,RBEP)) -$(eval $(call cse_add_dummy_to_bp1_bp2,UFSP)) -$(eval $(call cse_add_dummy_to_bp1_bp2,UFSG)) -$(eval $(call cse_add_input_to_bp1_bp2,OEMP)) -$(eval $(call cse_add_input_to_bp1_bp2,PMCP)) -$(eval $(call cse_add_decomp,bp1,MFTP)) -$(eval $(call cse_add_decomp,bp2,FTPR)) -$(eval $(call cse_add_input_to_bp1_bp2,IOMP)) -$(eval $(call cse_add_input_to_bp1_bp2,NPHY)) -$(eval $(call cse_add_input_to_bp1_bp2,TBTP)) -$(eval $(call cse_add_input_to_bp1_bp2,PCHC)) -$(eval $(call cse_add_decomp,bp2,NFTP)) -$(eval $(call cse_add_dummy,bp2,ISHP)) -$(eval $(call cse_add_input,bp2,IUNP)) - -endif - -ifeq ($(CONFIG_INCLUDE_HSPHY_IN_FMAP),y) -ifneq ($(call strip_quotes,$(CONFIG_HSPHY_FW_FILE)),) - -# Create the target HSPHY file that will be put into flashmap region. -# First goes the HSPHY size, then hash algorithm (3 - SHA384, default for now), -# the hash digest, padding to max digest size (SHA512 - 64 bytes) and at last the -# HSPHY firmware itself -$(obj)/hsphy_fw.bin: $(call strip_quotes,$(top)/$(CONFIG_HSPHY_FW_FILE)) - printf " HSPHY $(obj)/hsphy_fw.bin\n" - $(shell wc -c $< | awk '{print $$1}' | tr -d '\n' | xargs -0 printf '%08X' | \ - tac -rs .. | xxd -r -p > $@) - $(shell printf '%02X' 3 | xxd -r -p >> $@) - $(shell sha384sum $< | awk '{print $$1}' | tac -rs .. | xxd -r -p >> $@) - $(shell dd if=/dev/zero bs=1 count=16 2> /dev/null >> $@) - $(shell cat $< >> $@) - -add_hsphy_firmware: $(obj)/hsphy_fw.bin $(obj)/fmap.fmap $(obj)/coreboot.pre $(CBFSTOOL) - $(CBFSTOOL) $(obj)/coreboot.pre write -u -r HSPHY_FW -f $(obj)/hsphy_fw.bin - -$(call add_intermediate, add_hsphy_firmware) - -endif -endif - -endif diff --git a/src/soc/intel/alderlake/Makefile.mk b/src/soc/intel/alderlake/Makefile.mk new file mode 100644 index 0000000000..55fc83ea7c --- /dev/null +++ b/src/soc/intel/alderlake/Makefile.mk @@ -0,0 +1,143 @@ +## SPDX-License-Identifier: GPL-2.0-only +ifeq ($(CONFIG_SOC_INTEL_ALDERLAKE),y) +subdirs-y += romstage +subdirs-y += ../../../cpu/intel/microcode +subdirs-y += ../../../cpu/intel/turbo + +# all (bootblock, verstage, romstage, postcar, ramstage) +all-y += gspi.c +all-y += i2c.c +all-y += pmutil.c +all-y += spi.c +all-y += uart.c + +bootblock-y += bootblock/bootblock.c +bootblock-y += bootblock/pch.c +bootblock-y += bootblock/report_platform.c +bootblock-y += espi.c +bootblock-y += p2sb.c +bootblock-$(CONFIG_ALDERLAKE_CONFIGURE_DESCRIPTOR) += bootblock/update_descriptor.c + +romstage-$(CONFIG_SOC_INTEL_CSE_PRE_CPU_RESET_TELEMETRY) += cse_telemetry.c +romstage-y += espi.c +romstage-y += meminit.c +romstage-y += pcie_rp.c +romstage-y += reset.c + +ramstage-y += acpi.c +ramstage-y += chip.c +ramstage-y += cpu.c +ramstage-y += elog.c +ramstage-y += espi.c +ramstage-y += finalize.c +ramstage-y += fsp_params.c +ramstage-y += graphics.c +ramstage-y += hsphy.c +ramstage-y += lockdown.c +ramstage-y += p2sb.c +ramstage-y += pcie_rp.c +ramstage-y += pmc.c +ramstage-y += reset.c +ramstage-$(CONFIG_SOC_INTEL_ALDERLAKE_TCSS_USB4_SUPPORT) += retimer.c +ramstage-y += soundwire.c +ramstage-y += systemagent.c +ramstage-y += tcss.c +ramstage-y += vr_config.c +ramstage-y += xhci.c +ramstage-$(CONFIG_SOC_INTEL_CRASHLOG) += crashlog.c + +smm-y += elog.c +smm-y += p2sb.c +smm-y += pmutil.c +smm-y += smihandler.c +smm-y += uart.c +smm-y += xhci.c + +ifeq ($(CONFIG_SOC_INTEL_ALDERLAKE_PCH_S),y) +bootblock-y += gpio_pch_s.c +romstage-y += gpio_pch_s.c +ramstage-y += gpio_pch_s.c +smm-y += gpio_pch_s.c +verstage-y += gpio_pch_s.c +else +bootblock-y += gpio.c +romstage-y += gpio.c +ramstage-y += gpio.c +smm-y += gpio.c +verstage-y += gpio.c +endif + +CPPFLAGS_common += -I$(src)/soc/intel/alderlake +CPPFLAGS_common += -I$(src)/soc/intel/alderlake/include + +# Include the missing MemInfoHob.h from vendorcode +ifeq ($(CONFIG_SOC_INTEL_RAPTORLAKE_PCH_S)$(CONFIG_FSP_TYPE_IOT),yy) +CPPFLAGS_common += -I$(src)/vendorcode/intel/fsp/fsp2_0/iot/raptorlake_s +endif + +ifeq ($(CONFIG_SOC_INTEL_ALDERLAKE_PCH_S),y) +# 06-97-00, 06-97-01, 06-97-04 are ADL-S Engineering Samples +# 06-97-02 are ADL-S/HX Quality Samples but also ADL-HX Engineering Samples +# 06-b7-00 are RPL-S Engineering Samples +# ADL-S/HX C0/H0 and RPL-S C0/H0 +cpu_microcode_bins += 3rdparty/intel-microcode/intel-ucode/06-97-05 +# RPL-S/HX B0 +cpu_microcode_bins += 3rdparty/intel-microcode/intel-ucode/06-b7-01 +else ifeq ($(CONFIG_SOC_INTEL_ALDERLAKE_PCH_N),y) +cpu_microcode_bins += 3rdparty/intel-microcode/intel-ucode/06-be-00 +else +# 06-9a-00, 06-9a-01 are ADL-P/ADL-M Engineering Samples +# Missing 06-9a-02 ADL-P K0 +# ADL-P L0, ADL-P R0 and ADL-M R0 +cpu_microcode_bins += 3rdparty/intel-microcode/intel-ucode/06-9a-04 +# RPL-P/H J0, RPL-U Q0 +cpu_microcode_bins += 3rdparty/intel-microcode/intel-ucode/06-ba-02 +endif + +ifeq ($(CONFIG_STITCH_ME_BIN),y) + +$(eval $(call cse_add_dummy_to_bp1_bp2,DLMP)) +$(eval $(call cse_add_dummy_to_bp1_bp2,IFPP)) +$(eval $(call cse_add_dummy_to_bp1_bp2,SBDT)) +$(eval $(call cse_add_decomp_to_bp1_bp2,RBEP)) +$(eval $(call cse_add_dummy_to_bp1_bp2,UFSP)) +$(eval $(call cse_add_dummy_to_bp1_bp2,UFSG)) +$(eval $(call cse_add_input_to_bp1_bp2,OEMP)) +$(eval $(call cse_add_input_to_bp1_bp2,PMCP)) +$(eval $(call cse_add_decomp,bp1,MFTP)) +$(eval $(call cse_add_decomp,bp2,FTPR)) +$(eval $(call cse_add_input_to_bp1_bp2,IOMP)) +$(eval $(call cse_add_input_to_bp1_bp2,NPHY)) +$(eval $(call cse_add_input_to_bp1_bp2,TBTP)) +$(eval $(call cse_add_input_to_bp1_bp2,PCHC)) +$(eval $(call cse_add_decomp,bp2,NFTP)) +$(eval $(call cse_add_dummy,bp2,ISHP)) +$(eval $(call cse_add_input,bp2,IUNP)) + +endif + +ifeq ($(CONFIG_INCLUDE_HSPHY_IN_FMAP),y) +ifneq ($(call strip_quotes,$(CONFIG_HSPHY_FW_FILE)),) + +# Create the target HSPHY file that will be put into flashmap region. +# First goes the HSPHY size, then hash algorithm (3 - SHA384, default for now), +# the hash digest, padding to max digest size (SHA512 - 64 bytes) and at last the +# HSPHY firmware itself +$(obj)/hsphy_fw.bin: $(call strip_quotes,$(top)/$(CONFIG_HSPHY_FW_FILE)) + printf " HSPHY $(obj)/hsphy_fw.bin\n" + $(shell wc -c $< | awk '{print $$1}' | tr -d '\n' | xargs -0 printf '%08X' | \ + tac -rs .. | xxd -r -p > $@) + $(shell printf '%02X' 3 | xxd -r -p >> $@) + $(shell sha384sum $< | awk '{print $$1}' | tac -rs .. | xxd -r -p >> $@) + $(shell dd if=/dev/zero bs=1 count=16 2> /dev/null >> $@) + $(shell cat $< >> $@) + +add_hsphy_firmware: $(obj)/hsphy_fw.bin $(obj)/fmap.fmap $(obj)/coreboot.pre $(CBFSTOOL) + $(CBFSTOOL) $(obj)/coreboot.pre write -u -r HSPHY_FW -f $(obj)/hsphy_fw.bin + +$(call add_intermediate, add_hsphy_firmware) + +endif +endif + +endif diff --git a/src/soc/intel/alderlake/romstage/Makefile.inc b/src/soc/intel/alderlake/romstage/Makefile.inc deleted file mode 100644 index e8be1f5a8c..0000000000 --- a/src/soc/intel/alderlake/romstage/Makefile.inc +++ /dev/null @@ -1,8 +0,0 @@ -# SPDX-License-Identifier: GPL-2.0-only - -romstage-y += fsp_params.c -romstage-y += ../../../../cpu/intel/car/romstage.c -romstage-y += romstage.c -romstage-y += systemagent.c -romstage-$(CONFIG_EARLY_GFX_GMA) += graphics.c -romstage-y += ux.c diff --git a/src/soc/intel/alderlake/romstage/Makefile.mk b/src/soc/intel/alderlake/romstage/Makefile.mk new file mode 100644 index 0000000000..e8be1f5a8c --- /dev/null +++ b/src/soc/intel/alderlake/romstage/Makefile.mk @@ -0,0 +1,8 @@ +# SPDX-License-Identifier: GPL-2.0-only + +romstage-y += fsp_params.c +romstage-y += ../../../../cpu/intel/car/romstage.c +romstage-y += romstage.c +romstage-y += systemagent.c +romstage-$(CONFIG_EARLY_GFX_GMA) += graphics.c +romstage-y += ux.c diff --git a/src/soc/intel/apollolake/Makefile.inc b/src/soc/intel/apollolake/Makefile.inc deleted file mode 100644 index 82937bc9a6..0000000000 --- a/src/soc/intel/apollolake/Makefile.inc +++ /dev/null @@ -1,208 +0,0 @@ -## SPDX-License-Identifier: GPL-2.0-only -ifeq ($(CONFIG_SOC_INTEL_APOLLOLAKE),y) - -subdirs-y += ../../../cpu/intel/common -subdirs-y += ../../../cpu/intel/microcode -subdirs-y += ../../../cpu/intel/turbo - -bootblock-$(CONFIG_TPM_MEASURED_BOOT) += bootblock/bootblock_measure.c -bootblock-y += bootblock/bootblock.c -bootblock-y += ../common/block/cpu/pm_timer_emulation.c -bootblock-y += car.c -bootblock-y += heci.c -bootblock-y += gspi.c -bootblock-y += i2c.c -bootblock-y += lpc.c -bootblock-y += mmap_boot.c -bootblock-y += pmutil.c -bootblock-y += spi.c -bootblock-y += uart.c - -romstage-y += car.c -romstage-y += ../../../cpu/intel/car/romstage.c -romstage-y += romstage.c -romstage-y += report_platform.c -romstage-y += gspi.c -romstage-y += heci.c -romstage-y += i2c.c -romstage-y += uart.c -romstage-y += meminit.c -ifeq ($(CONFIG_SOC_INTEL_GEMINILAKE),y) -romstage-y += meminit_util_glk.c -else -romstage-y += meminit_util_apl.c -endif -romstage-y += mmap_boot.c -romstage-y += pmutil.c -romstage-y += reset.c -romstage-y += spi.c - -smm-y += mmap_boot.c -smm-y += pmutil.c -smm-y += smihandler.c -smm-y += spi.c -smm-y += uart.c -smm-y += elog.c -smm-y += xhci.c - -ramstage-$(CONFIG_HAVE_ACPI_TABLES) += acpi.c -ramstage-y += ahci.c -ramstage-y += cpu.c -ramstage-y += chip.c -ramstage-y += cse.c -ramstage-y += elog.c -ramstage-y += graphics.c -ramstage-y += gspi.c -ramstage-y += heci.c -ramstage-y += i2c.c -ramstage-y += lockdown.c -ramstage-y += lpc.c -ramstage-y += mmap_boot.c -ramstage-y += uart.c -ramstage-y += nhlt.c -ramstage-y += spi.c -ramstage-y += systemagent.c -ramstage-y += pmutil.c -ramstage-y += pnpconfig.c -ramstage-y += pmc.c -ramstage-y += reset.c -ramstage-y += xdci.c -ramstage-y += sd.c -ramstage-y += xhci.c - -postcar-y += mmap_boot.c -postcar-y += spi.c -postcar-y += i2c.c -postcar-y += heci.c -postcar-y += reset.c -postcar-y += uart.c -postcar-y += gspi.c - -verstage-y += car.c -verstage-y += i2c.c -verstage-y += gspi.c -verstage-y += heci.c -verstage-y += mmap_boot.c -verstage-y += uart.c -verstage-y += pmutil.c -verstage-y += reset.c -verstage-y += spi.c - -ifeq ($(CONFIG_SOC_INTEL_GEMINILAKE),y) -bootblock-y += gpio_glk.c -romstage-y += gpio_glk.c -smm-y += gpio_glk.c -ramstage-y += gpio_glk.c -verstage-y += gpio_glk.c -else -bootblock-y += gpio_apl.c -romstage-y += gpio_apl.c -smm-y += gpio_apl.c -ramstage-y += gpio_apl.c -verstage-y += gpio_apl.c -endif - -CPPFLAGS_common += -I$(src)/soc/intel/apollolake/include - -# Since FSP-M runs in CAR we need to relocate it to a specific address -$(call strip_quotes,$(CONFIG_FSP_M_CBFS))-options := -b $(CONFIG_FSP_M_ADDR) - -# Handle GLK paging requirements -ifeq ($(CONFIG_PAGING_IN_CACHE_AS_RAM),y) -cbfs-files-y += pt -pt-file := pt.c:struct -pt-type := raw -cbfs-files-y += pdpt -pdpt-file := pdpt.c:struct -pdpt-type := raw -endif - -ifeq ($(CONFIG_NEED_LBP2),y) -$(objcbfs)/lbp2.bin: $(IFWITOOL) -ifeq ($(CONFIG_LBP2_FROM_IFWI),y) - $(IFWITOOL) $(CONFIG_IFWI_FILE_NAME) create -f $@ -s - $(IFWITOOL) $@ delete -n OBBP -else - cp $(CONFIG_LBP2_FILE_NAME) $@ -endif - -$(call add_intermediate, write_lbp2, $(objcbfs)/lbp2.bin) - @printf " FMAP writing lbp2 to %s\n" $(CONFIG_LBP2_FMAP_NAME) - $(CBFSTOOL) $< write -r $(CONFIG_LBP2_FMAP_NAME) -f $< --fill-upward -endif - -# Bootblock on Apollolake platform lies in the IFWI region. In order to place -# the bootblock at the right location in IFWI image - -# a. Using ifwitool: -# 1. Create IFWI image (ifwi.bin.tmp) from input image -# (CONFIG_IFWI_FILE_NAME). -# 2. Delete OBBP sub-partition, if present. -# 3. Replace IBBL directory entry in IBBP sub-partition with currently -# generated bootblock.bin. -# b. Using cbfstool: -# 1. Write ifwi.bin.tmp to coreboot.rom using CONFIG_IFWI_FMAP_NAME. -ifeq ($(CONFIG_NEED_IFWI),y) -$(call add_intermediate, write_ifwi, $(objcbfs)/bootblock.bin $(IFWITOOL)) - @printf " IFWI Embedding %s in %s\n" $(objcbfs)/bootblock.bin $(CONFIG_IFWI_FMAP_NAME) - $(IFWITOOL) $(CONFIG_IFWI_FILE_NAME) create -f $(objcbfs)/ifwi.bin.tmp - $(IFWITOOL) $(objcbfs)/ifwi.bin.tmp delete -n OBBP - $(IFWITOOL) $(objcbfs)/ifwi.bin.tmp replace -n IBBP -f $(objcbfs)/bootblock.bin -d -e IBBL - $(CBFSTOOL) $< write -r $(CONFIG_IFWI_FMAP_NAME) -f $(objcbfs)/ifwi.bin.tmp --fill-upward -endif - -# When booting APL the IBBL loader places the microcode updates embedded -# in the IFWI image and a matching FIT table in SRAM. After copying the -# bootblock to SRAM, it updates the FIT pointer at 0xffffffc0 to point -# to that table. Before releasing the x86 cores from reset, the regular FIT -# mechanism does the updates. So coreboot does not need to generate a FIT -# table + pointer, but reserving the pointer is still needed. Otherwise the -# IBBL loader thrashes code there. So include fit.c so that the linker -# reserves that pointer. -bootblock-y += bootblock/fit.c - -# DSP firmware settings files. -ifeq ($(CONFIG_SOC_INTEL_GEMINILAKE),y) -NHLT_BLOB_PATH = 3rdparty/blobs/soc/intel/glk/nhlt-blobs -else -NHLT_BLOB_PATH = 3rdparty/blobs/soc/intel/apollolake/nhlt-blobs -endif -DMIC_1CH_48KHZ_16B = dmic-1ch-48khz-16b.bin -DMIC_2CH_48KHZ_16B = dmic-2ch-48khz-16b.bin -DMIC_4CH_48KHZ_16B = dmic-4ch-48khz-16b.bin -MAX98357_RENDER = max98357-render-2ch-48khz-24b.bin -DA7219_RENDER_CAPTURE = dialog-2ch-48khz-24b.bin -RT5682_RENDER_CAPTURE = rt5682-2ch-48khz-24b.bin - -cbfs-files-$(CONFIG_NHLT_DMIC_1CH_16B) += $(DMIC_1CH_48KHZ_16B) -$(DMIC_1CH_48KHZ_16B)-file := $(NHLT_BLOB_PATH)/$(DMIC_1CH_48KHZ_16B) -$(DMIC_1CH_48KHZ_16B)-type := raw - -cbfs-files-$(CONFIG_NHLT_DMIC_2CH_16B) += $(DMIC_2CH_48KHZ_16B) -$(DMIC_2CH_48KHZ_16B)-file := $(NHLT_BLOB_PATH)/$(DMIC_2CH_48KHZ_16B) -$(DMIC_2CH_48KHZ_16B)-type := raw - -cbfs-files-$(CONFIG_NHLT_DMIC_4CH_16B) += $(DMIC_4CH_48KHZ_16B) -$(DMIC_4CH_48KHZ_16B)-file := $(NHLT_BLOB_PATH)/$(DMIC_4CH_48KHZ_16B) -$(DMIC_4CH_48KHZ_16B)-type := raw - -cbfs-files-$(CONFIG_NHLT_MAX98357) += $(MAX98357_RENDER) -$(MAX98357_RENDER)-file := $(NHLT_BLOB_PATH)/$(MAX98357_RENDER) -$(MAX98357_RENDER)-type := raw - -cbfs-files-$(CONFIG_NHLT_DA7219) += $(DA7219_RENDER_CAPTURE) -$(DA7219_RENDER_CAPTURE)-file := $(NHLT_BLOB_PATH)/$(DA7219_RENDER_CAPTURE) -$(DA7219_RENDER_CAPTURE)-type := raw - -cbfs-files-$(CONFIG_NHLT_RT5682) += $(RT5682_RENDER_CAPTURE) -$(RT5682_RENDER_CAPTURE)-file := $(NHLT_BLOB_PATH)/$(RT5682_RENDER_CAPTURE) -$(RT5682_RENDER_CAPTURE)-type := raw - -ifeq ($(CONFIG_SOC_INTEL_GEMINILAKE),y) -# Gemini Lake B0 (706a1) only atm. -cpu_microcode_bins += $(wildcard 3rdparty/intel-microcode/intel-ucode/06-7a-*) -else -# Apollo Lake 506c2, B0 (506c9) and E0 (506ca) only atm. -cpu_microcode_bins += $(wildcard 3rdparty/intel-microcode/intel-ucode/06-5c-*) -endif - -endif # if CONFIG_SOC_INTEL_APOLLOLAKE diff --git a/src/soc/intel/apollolake/Makefile.mk b/src/soc/intel/apollolake/Makefile.mk new file mode 100644 index 0000000000..82937bc9a6 --- /dev/null +++ b/src/soc/intel/apollolake/Makefile.mk @@ -0,0 +1,208 @@ +## SPDX-License-Identifier: GPL-2.0-only +ifeq ($(CONFIG_SOC_INTEL_APOLLOLAKE),y) + +subdirs-y += ../../../cpu/intel/common +subdirs-y += ../../../cpu/intel/microcode +subdirs-y += ../../../cpu/intel/turbo + +bootblock-$(CONFIG_TPM_MEASURED_BOOT) += bootblock/bootblock_measure.c +bootblock-y += bootblock/bootblock.c +bootblock-y += ../common/block/cpu/pm_timer_emulation.c +bootblock-y += car.c +bootblock-y += heci.c +bootblock-y += gspi.c +bootblock-y += i2c.c +bootblock-y += lpc.c +bootblock-y += mmap_boot.c +bootblock-y += pmutil.c +bootblock-y += spi.c +bootblock-y += uart.c + +romstage-y += car.c +romstage-y += ../../../cpu/intel/car/romstage.c +romstage-y += romstage.c +romstage-y += report_platform.c +romstage-y += gspi.c +romstage-y += heci.c +romstage-y += i2c.c +romstage-y += uart.c +romstage-y += meminit.c +ifeq ($(CONFIG_SOC_INTEL_GEMINILAKE),y) +romstage-y += meminit_util_glk.c +else +romstage-y += meminit_util_apl.c +endif +romstage-y += mmap_boot.c +romstage-y += pmutil.c +romstage-y += reset.c +romstage-y += spi.c + +smm-y += mmap_boot.c +smm-y += pmutil.c +smm-y += smihandler.c +smm-y += spi.c +smm-y += uart.c +smm-y += elog.c +smm-y += xhci.c + +ramstage-$(CONFIG_HAVE_ACPI_TABLES) += acpi.c +ramstage-y += ahci.c +ramstage-y += cpu.c +ramstage-y += chip.c +ramstage-y += cse.c +ramstage-y += elog.c +ramstage-y += graphics.c +ramstage-y += gspi.c +ramstage-y += heci.c +ramstage-y += i2c.c +ramstage-y += lockdown.c +ramstage-y += lpc.c +ramstage-y += mmap_boot.c +ramstage-y += uart.c +ramstage-y += nhlt.c +ramstage-y += spi.c +ramstage-y += systemagent.c +ramstage-y += pmutil.c +ramstage-y += pnpconfig.c +ramstage-y += pmc.c +ramstage-y += reset.c +ramstage-y += xdci.c +ramstage-y += sd.c +ramstage-y += xhci.c + +postcar-y += mmap_boot.c +postcar-y += spi.c +postcar-y += i2c.c +postcar-y += heci.c +postcar-y += reset.c +postcar-y += uart.c +postcar-y += gspi.c + +verstage-y += car.c +verstage-y += i2c.c +verstage-y += gspi.c +verstage-y += heci.c +verstage-y += mmap_boot.c +verstage-y += uart.c +verstage-y += pmutil.c +verstage-y += reset.c +verstage-y += spi.c + +ifeq ($(CONFIG_SOC_INTEL_GEMINILAKE),y) +bootblock-y += gpio_glk.c +romstage-y += gpio_glk.c +smm-y += gpio_glk.c +ramstage-y += gpio_glk.c +verstage-y += gpio_glk.c +else +bootblock-y += gpio_apl.c +romstage-y += gpio_apl.c +smm-y += gpio_apl.c +ramstage-y += gpio_apl.c +verstage-y += gpio_apl.c +endif + +CPPFLAGS_common += -I$(src)/soc/intel/apollolake/include + +# Since FSP-M runs in CAR we need to relocate it to a specific address +$(call strip_quotes,$(CONFIG_FSP_M_CBFS))-options := -b $(CONFIG_FSP_M_ADDR) + +# Handle GLK paging requirements +ifeq ($(CONFIG_PAGING_IN_CACHE_AS_RAM),y) +cbfs-files-y += pt +pt-file := pt.c:struct +pt-type := raw +cbfs-files-y += pdpt +pdpt-file := pdpt.c:struct +pdpt-type := raw +endif + +ifeq ($(CONFIG_NEED_LBP2),y) +$(objcbfs)/lbp2.bin: $(IFWITOOL) +ifeq ($(CONFIG_LBP2_FROM_IFWI),y) + $(IFWITOOL) $(CONFIG_IFWI_FILE_NAME) create -f $@ -s + $(IFWITOOL) $@ delete -n OBBP +else + cp $(CONFIG_LBP2_FILE_NAME) $@ +endif + +$(call add_intermediate, write_lbp2, $(objcbfs)/lbp2.bin) + @printf " FMAP writing lbp2 to %s\n" $(CONFIG_LBP2_FMAP_NAME) + $(CBFSTOOL) $< write -r $(CONFIG_LBP2_FMAP_NAME) -f $< --fill-upward +endif + +# Bootblock on Apollolake platform lies in the IFWI region. In order to place +# the bootblock at the right location in IFWI image - +# a. Using ifwitool: +# 1. Create IFWI image (ifwi.bin.tmp) from input image +# (CONFIG_IFWI_FILE_NAME). +# 2. Delete OBBP sub-partition, if present. +# 3. Replace IBBL directory entry in IBBP sub-partition with currently +# generated bootblock.bin. +# b. Using cbfstool: +# 1. Write ifwi.bin.tmp to coreboot.rom using CONFIG_IFWI_FMAP_NAME. +ifeq ($(CONFIG_NEED_IFWI),y) +$(call add_intermediate, write_ifwi, $(objcbfs)/bootblock.bin $(IFWITOOL)) + @printf " IFWI Embedding %s in %s\n" $(objcbfs)/bootblock.bin $(CONFIG_IFWI_FMAP_NAME) + $(IFWITOOL) $(CONFIG_IFWI_FILE_NAME) create -f $(objcbfs)/ifwi.bin.tmp + $(IFWITOOL) $(objcbfs)/ifwi.bin.tmp delete -n OBBP + $(IFWITOOL) $(objcbfs)/ifwi.bin.tmp replace -n IBBP -f $(objcbfs)/bootblock.bin -d -e IBBL + $(CBFSTOOL) $< write -r $(CONFIG_IFWI_FMAP_NAME) -f $(objcbfs)/ifwi.bin.tmp --fill-upward +endif + +# When booting APL the IBBL loader places the microcode updates embedded +# in the IFWI image and a matching FIT table in SRAM. After copying the +# bootblock to SRAM, it updates the FIT pointer at 0xffffffc0 to point +# to that table. Before releasing the x86 cores from reset, the regular FIT +# mechanism does the updates. So coreboot does not need to generate a FIT +# table + pointer, but reserving the pointer is still needed. Otherwise the +# IBBL loader thrashes code there. So include fit.c so that the linker +# reserves that pointer. +bootblock-y += bootblock/fit.c + +# DSP firmware settings files. +ifeq ($(CONFIG_SOC_INTEL_GEMINILAKE),y) +NHLT_BLOB_PATH = 3rdparty/blobs/soc/intel/glk/nhlt-blobs +else +NHLT_BLOB_PATH = 3rdparty/blobs/soc/intel/apollolake/nhlt-blobs +endif +DMIC_1CH_48KHZ_16B = dmic-1ch-48khz-16b.bin +DMIC_2CH_48KHZ_16B = dmic-2ch-48khz-16b.bin +DMIC_4CH_48KHZ_16B = dmic-4ch-48khz-16b.bin +MAX98357_RENDER = max98357-render-2ch-48khz-24b.bin +DA7219_RENDER_CAPTURE = dialog-2ch-48khz-24b.bin +RT5682_RENDER_CAPTURE = rt5682-2ch-48khz-24b.bin + +cbfs-files-$(CONFIG_NHLT_DMIC_1CH_16B) += $(DMIC_1CH_48KHZ_16B) +$(DMIC_1CH_48KHZ_16B)-file := $(NHLT_BLOB_PATH)/$(DMIC_1CH_48KHZ_16B) +$(DMIC_1CH_48KHZ_16B)-type := raw + +cbfs-files-$(CONFIG_NHLT_DMIC_2CH_16B) += $(DMIC_2CH_48KHZ_16B) +$(DMIC_2CH_48KHZ_16B)-file := $(NHLT_BLOB_PATH)/$(DMIC_2CH_48KHZ_16B) +$(DMIC_2CH_48KHZ_16B)-type := raw + +cbfs-files-$(CONFIG_NHLT_DMIC_4CH_16B) += $(DMIC_4CH_48KHZ_16B) +$(DMIC_4CH_48KHZ_16B)-file := $(NHLT_BLOB_PATH)/$(DMIC_4CH_48KHZ_16B) +$(DMIC_4CH_48KHZ_16B)-type := raw + +cbfs-files-$(CONFIG_NHLT_MAX98357) += $(MAX98357_RENDER) +$(MAX98357_RENDER)-file := $(NHLT_BLOB_PATH)/$(MAX98357_RENDER) +$(MAX98357_RENDER)-type := raw + +cbfs-files-$(CONFIG_NHLT_DA7219) += $(DA7219_RENDER_CAPTURE) +$(DA7219_RENDER_CAPTURE)-file := $(NHLT_BLOB_PATH)/$(DA7219_RENDER_CAPTURE) +$(DA7219_RENDER_CAPTURE)-type := raw + +cbfs-files-$(CONFIG_NHLT_RT5682) += $(RT5682_RENDER_CAPTURE) +$(RT5682_RENDER_CAPTURE)-file := $(NHLT_BLOB_PATH)/$(RT5682_RENDER_CAPTURE) +$(RT5682_RENDER_CAPTURE)-type := raw + +ifeq ($(CONFIG_SOC_INTEL_GEMINILAKE),y) +# Gemini Lake B0 (706a1) only atm. +cpu_microcode_bins += $(wildcard 3rdparty/intel-microcode/intel-ucode/06-7a-*) +else +# Apollo Lake 506c2, B0 (506c9) and E0 (506ca) only atm. +cpu_microcode_bins += $(wildcard 3rdparty/intel-microcode/intel-ucode/06-5c-*) +endif + +endif # if CONFIG_SOC_INTEL_APOLLOLAKE diff --git a/src/soc/intel/baytrail/Makefile.inc b/src/soc/intel/baytrail/Makefile.inc deleted file mode 100644 index 281175c9a8..0000000000 --- a/src/soc/intel/baytrail/Makefile.inc +++ /dev/null @@ -1,87 +0,0 @@ -## SPDX-License-Identifier: GPL-2.0-only -ifeq ($(CONFIG_SOC_INTEL_BAYTRAIL),y) - -subdirs-y += romstage -subdirs-y += ../../../cpu/intel/microcode -subdirs-y += ../../../cpu/intel/turbo -subdirs-y += ../../../cpu/intel/common - -all-y += tsc_freq.c - -bootblock-y += ../../../cpu/intel/car/non-evict/cache_as_ram.S -bootblock-y += ../../../cpu/intel/car/bootblock.c -bootblock-y += ../../../cpu/x86/early_reset.S -bootblock-y += bootblock/bootblock.c - -romstage-y += iosf.c -romstage-y += memmap.c -romstage-y += pmutil.c - -postcar-y += iosf.c -postcar-y += memmap.c - -ramstage-y += acpi.c -ramstage-y += chip.c -ramstage-y += cpu.c -ramstage-y += dptf.c -ramstage-y += ehci.c -ramstage-y += emmc.c -ramstage-y += fadt.c -ramstage-y += gfx.c -ramstage-y += gpio.c -ramstage-y += hda.c -ramstage-y += iosf.c -ramstage-y += lpe.c -ramstage-y += lpss.c -ramstage-y += memmap.c -ramstage-y += northcluster.c -ramstage-y += pcie.c -ramstage-y += perf_power.c -ramstage-y += pmutil.c -ramstage-y += ramstage.c -ramstage-y += sata.c -ramstage-y += scc.c -ramstage-y += sd.c -ramstage-y += smm.c -ramstage-y += southcluster.c -ramstage-y += xhci.c -ramstage-$(CONFIG_ELOG) += elog.c -ramstage-$(CONFIG_VGA_ROM_RUN) += int15.c - -ifeq ($(CONFIG_HAVE_REFCODE_BLOB),y) -ramstage-y += refcode.c -else -ramstage-y += modphy_table.c refcode_native.c -endif - -smm-y += iosf.c -smm-y += pmutil.c -smm-y += smihandler.c -smm-y += tsc_freq.c - -# Remove as ramstage gets fleshed out -ramstage-y += placeholders.c - -postcar-y += ../../../cpu/intel/car/non-evict/exit_car.S - -cpu_microcode_bins += 3rdparty/blobs/soc/intel/baytrail/microcode.bin \ - 3rdparty/intel-microcode/intel-ucode/06-37-09 - -CPPFLAGS_common += -Isrc/soc/intel/baytrail/include - -ifeq ($(CONFIG_HAVE_MRC),y) - -# Bay Trail MRC is an ELF file. Determine the entry address and first loadable -# section offset in the file. Subtract the offset from the entry address to -# determine the final location. -mrcelfoffset = $(shell $(READELF_x86_32) -S -W $(CONFIG_MRC_FILE) | sed -e 's/\[ /[0/' | awk '$$3 ~ /PROGBITS/ { print "0x"$$5; exit }' ) -mrcelfentry = $(shell $(READELF_x86_32) -h -W $(CONFIG_MRC_FILE) | grep 'Entry point address' | awk '{print $$NF }') - -# Add memory reference code blob. -cbfs-files-y += mrc.bin -mrc.bin-file := $(call strip_quotes,$(CONFIG_MRC_FILE)) -mrc.bin-position := $(shell printf "0x%x" $$(( $(mrcelfentry) - $(mrcelfoffset) )) ) -mrc.bin-type := mrc - -endif -endif diff --git a/src/soc/intel/baytrail/Makefile.mk b/src/soc/intel/baytrail/Makefile.mk new file mode 100644 index 0000000000..281175c9a8 --- /dev/null +++ b/src/soc/intel/baytrail/Makefile.mk @@ -0,0 +1,87 @@ +## SPDX-License-Identifier: GPL-2.0-only +ifeq ($(CONFIG_SOC_INTEL_BAYTRAIL),y) + +subdirs-y += romstage +subdirs-y += ../../../cpu/intel/microcode +subdirs-y += ../../../cpu/intel/turbo +subdirs-y += ../../../cpu/intel/common + +all-y += tsc_freq.c + +bootblock-y += ../../../cpu/intel/car/non-evict/cache_as_ram.S +bootblock-y += ../../../cpu/intel/car/bootblock.c +bootblock-y += ../../../cpu/x86/early_reset.S +bootblock-y += bootblock/bootblock.c + +romstage-y += iosf.c +romstage-y += memmap.c +romstage-y += pmutil.c + +postcar-y += iosf.c +postcar-y += memmap.c + +ramstage-y += acpi.c +ramstage-y += chip.c +ramstage-y += cpu.c +ramstage-y += dptf.c +ramstage-y += ehci.c +ramstage-y += emmc.c +ramstage-y += fadt.c +ramstage-y += gfx.c +ramstage-y += gpio.c +ramstage-y += hda.c +ramstage-y += iosf.c +ramstage-y += lpe.c +ramstage-y += lpss.c +ramstage-y += memmap.c +ramstage-y += northcluster.c +ramstage-y += pcie.c +ramstage-y += perf_power.c +ramstage-y += pmutil.c +ramstage-y += ramstage.c +ramstage-y += sata.c +ramstage-y += scc.c +ramstage-y += sd.c +ramstage-y += smm.c +ramstage-y += southcluster.c +ramstage-y += xhci.c +ramstage-$(CONFIG_ELOG) += elog.c +ramstage-$(CONFIG_VGA_ROM_RUN) += int15.c + +ifeq ($(CONFIG_HAVE_REFCODE_BLOB),y) +ramstage-y += refcode.c +else +ramstage-y += modphy_table.c refcode_native.c +endif + +smm-y += iosf.c +smm-y += pmutil.c +smm-y += smihandler.c +smm-y += tsc_freq.c + +# Remove as ramstage gets fleshed out +ramstage-y += placeholders.c + +postcar-y += ../../../cpu/intel/car/non-evict/exit_car.S + +cpu_microcode_bins += 3rdparty/blobs/soc/intel/baytrail/microcode.bin \ + 3rdparty/intel-microcode/intel-ucode/06-37-09 + +CPPFLAGS_common += -Isrc/soc/intel/baytrail/include + +ifeq ($(CONFIG_HAVE_MRC),y) + +# Bay Trail MRC is an ELF file. Determine the entry address and first loadable +# section offset in the file. Subtract the offset from the entry address to +# determine the final location. +mrcelfoffset = $(shell $(READELF_x86_32) -S -W $(CONFIG_MRC_FILE) | sed -e 's/\[ /[0/' | awk '$$3 ~ /PROGBITS/ { print "0x"$$5; exit }' ) +mrcelfentry = $(shell $(READELF_x86_32) -h -W $(CONFIG_MRC_FILE) | grep 'Entry point address' | awk '{print $$NF }') + +# Add memory reference code blob. +cbfs-files-y += mrc.bin +mrc.bin-file := $(call strip_quotes,$(CONFIG_MRC_FILE)) +mrc.bin-position := $(shell printf "0x%x" $$(( $(mrcelfentry) - $(mrcelfoffset) )) ) +mrc.bin-type := mrc + +endif +endif diff --git a/src/soc/intel/baytrail/romstage/Makefile.inc b/src/soc/intel/baytrail/romstage/Makefile.inc deleted file mode 100644 index 95e69ec237..0000000000 --- a/src/soc/intel/baytrail/romstage/Makefile.inc +++ /dev/null @@ -1,6 +0,0 @@ -## SPDX-License-Identifier: GPL-2.0-only -romstage-y += ../../../../cpu/intel/car/romstage.c -romstage-y += romstage.c -romstage-y += raminit.c -romstage-y += gfx.c -romstage-y += pmc.c diff --git a/src/soc/intel/baytrail/romstage/Makefile.mk b/src/soc/intel/baytrail/romstage/Makefile.mk new file mode 100644 index 0000000000..95e69ec237 --- /dev/null +++ b/src/soc/intel/baytrail/romstage/Makefile.mk @@ -0,0 +1,6 @@ +## SPDX-License-Identifier: GPL-2.0-only +romstage-y += ../../../../cpu/intel/car/romstage.c +romstage-y += romstage.c +romstage-y += raminit.c +romstage-y += gfx.c +romstage-y += pmc.c diff --git a/src/soc/intel/braswell/Makefile.inc b/src/soc/intel/braswell/Makefile.inc deleted file mode 100644 index 923ba9d85c..0000000000 --- a/src/soc/intel/braswell/Makefile.inc +++ /dev/null @@ -1,78 +0,0 @@ -## SPDX-License-Identifier: GPL-2.0-only -ifeq ($(CONFIG_SOC_INTEL_BRASWELL),y) - -subdirs-y += romstage -subdirs-y += ../../../cpu/intel/microcode -subdirs-y += ../../../cpu/intel/turbo -subdirs-y += ../../../cpu/intel/common - -bootblock-y += gpio_support.c -bootblock-y += bootblock/bootblock.c -bootblock-y += lpc_init.c -bootblock-y += pmutil.c -bootblock-y += tsc_freq.c - -romstage-y += gpio_support.c -romstage-y += iosf.c -romstage-y += memmap.c -romstage-y += pmutil.c -romstage-y += smbus.c -romstage-y += tsc_freq.c - -postcar-y += memmap.c -postcar-y += iosf.c -postcar-y += tsc_freq.c - -ramstage-y += acpi.c -ramstage-y += chip.c -ramstage-y += cpu.c -ramstage-$(CONFIG_ELOG) += elog.c -ramstage-y += emmc.c -ramstage-y += fadt.c -ramstage-y += gpio.c -ramstage-y += gfx.c -ramstage-y += smbus.c - -ramstage-y += gpio_support.c -ramstage-y += iosf.c -ramstage-y += lpe.c -ramstage-y += lpss.c -ramstage-y += memmap.c -ramstage-y += northcluster.c -ramstage-y += pcie.c -ramstage-y += pmutil.c -ramstage-y += ramstage.c -ramstage-y += sata.c -ramstage-y += scc.c -ramstage-y += sd.c -ramstage-y += smm.c -ramstage-y += southcluster.c -ramstage-y += tsc_freq.c -ramstage-y += xhci.c - -# Remove as ramstage gets fleshed out -ramstage-y += placeholders.c -smm-y += lpc_init.c -smm-y += pmutil.c -smm-y += smihandler.c -smm-y += tsc_freq.c - -verstage-y += pmutil.c -verstage-y += tsc_freq.c - -CPPFLAGS_common += -I$(src)/soc/intel/braswell/ -CPPFLAGS_common += -I$(src)/soc/intel/braswell/include -CPPFLAGS_common += -I$(call strip_quotes,$(CONFIG_FSP_HEADER_PATH)) - -cpu_microcode_bins += $(wildcard 3rdparty/intel-microcode/intel-ucode/06-4c-*) - -ifneq ($(CONFIG_VGA_BIOS_FILE),) -#we will assume that the vbios names will remain as they are now: vgabios.bin and vgabios_c0.bin -BRASWELL_C0_VBIOS= $(subst .bin,_c0.bin,$(call strip_quotes,$(CONFIG_VGA_BIOS_FILE))) - -cbfs-files-$(CONFIG_VGA_BIOS) += pci8086,22b1.rom -pci8086,22b1.rom-file := $(BRASWELL_C0_VBIOS) -pci8086,22b1.rom-type := optionrom -endif # ifneq ($(CONFIG_VGA_BIOS_FILE),) - -endif # ifeq ($(CONFIG_SOC_INTEL_BRASWELL),y) diff --git a/src/soc/intel/braswell/Makefile.mk b/src/soc/intel/braswell/Makefile.mk new file mode 100644 index 0000000000..923ba9d85c --- /dev/null +++ b/src/soc/intel/braswell/Makefile.mk @@ -0,0 +1,78 @@ +## SPDX-License-Identifier: GPL-2.0-only +ifeq ($(CONFIG_SOC_INTEL_BRASWELL),y) + +subdirs-y += romstage +subdirs-y += ../../../cpu/intel/microcode +subdirs-y += ../../../cpu/intel/turbo +subdirs-y += ../../../cpu/intel/common + +bootblock-y += gpio_support.c +bootblock-y += bootblock/bootblock.c +bootblock-y += lpc_init.c +bootblock-y += pmutil.c +bootblock-y += tsc_freq.c + +romstage-y += gpio_support.c +romstage-y += iosf.c +romstage-y += memmap.c +romstage-y += pmutil.c +romstage-y += smbus.c +romstage-y += tsc_freq.c + +postcar-y += memmap.c +postcar-y += iosf.c +postcar-y += tsc_freq.c + +ramstage-y += acpi.c +ramstage-y += chip.c +ramstage-y += cpu.c +ramstage-$(CONFIG_ELOG) += elog.c +ramstage-y += emmc.c +ramstage-y += fadt.c +ramstage-y += gpio.c +ramstage-y += gfx.c +ramstage-y += smbus.c + +ramstage-y += gpio_support.c +ramstage-y += iosf.c +ramstage-y += lpe.c +ramstage-y += lpss.c +ramstage-y += memmap.c +ramstage-y += northcluster.c +ramstage-y += pcie.c +ramstage-y += pmutil.c +ramstage-y += ramstage.c +ramstage-y += sata.c +ramstage-y += scc.c +ramstage-y += sd.c +ramstage-y += smm.c +ramstage-y += southcluster.c +ramstage-y += tsc_freq.c +ramstage-y += xhci.c + +# Remove as ramstage gets fleshed out +ramstage-y += placeholders.c +smm-y += lpc_init.c +smm-y += pmutil.c +smm-y += smihandler.c +smm-y += tsc_freq.c + +verstage-y += pmutil.c +verstage-y += tsc_freq.c + +CPPFLAGS_common += -I$(src)/soc/intel/braswell/ +CPPFLAGS_common += -I$(src)/soc/intel/braswell/include +CPPFLAGS_common += -I$(call strip_quotes,$(CONFIG_FSP_HEADER_PATH)) + +cpu_microcode_bins += $(wildcard 3rdparty/intel-microcode/intel-ucode/06-4c-*) + +ifneq ($(CONFIG_VGA_BIOS_FILE),) +#we will assume that the vbios names will remain as they are now: vgabios.bin and vgabios_c0.bin +BRASWELL_C0_VBIOS= $(subst .bin,_c0.bin,$(call strip_quotes,$(CONFIG_VGA_BIOS_FILE))) + +cbfs-files-$(CONFIG_VGA_BIOS) += pci8086,22b1.rom +pci8086,22b1.rom-file := $(BRASWELL_C0_VBIOS) +pci8086,22b1.rom-type := optionrom +endif # ifneq ($(CONFIG_VGA_BIOS_FILE),) + +endif # ifeq ($(CONFIG_SOC_INTEL_BRASWELL),y) diff --git a/src/soc/intel/braswell/romstage/Makefile.inc b/src/soc/intel/braswell/romstage/Makefile.inc deleted file mode 100644 index 4405f0ebc4..0000000000 --- a/src/soc/intel/braswell/romstage/Makefile.inc +++ /dev/null @@ -1,3 +0,0 @@ -## SPDX-License-Identifier: GPL-2.0-only -romstage-y += ../../../../cpu/intel/car/romstage.c -romstage-y += romstage.c diff --git a/src/soc/intel/braswell/romstage/Makefile.mk b/src/soc/intel/braswell/romstage/Makefile.mk new file mode 100644 index 0000000000..4405f0ebc4 --- /dev/null +++ b/src/soc/intel/braswell/romstage/Makefile.mk @@ -0,0 +1,3 @@ +## SPDX-License-Identifier: GPL-2.0-only +romstage-y += ../../../../cpu/intel/car/romstage.c +romstage-y += romstage.c diff --git a/src/soc/intel/broadwell/Makefile.inc b/src/soc/intel/broadwell/Makefile.inc deleted file mode 100644 index 3565cd180b..0000000000 --- a/src/soc/intel/broadwell/Makefile.inc +++ /dev/null @@ -1,40 +0,0 @@ -## SPDX-License-Identifier: GPL-2.0-only -ifeq ($(CONFIG_SOC_INTEL_BROADWELL),y) - -subdirs-y += pch - -bootblock-y += bootblock.c - -romstage-y += early_init.c -romstage-y += raminit.c -romstage-y += report_platform.c -romstage-y += romstage.c -romstage-$(CONFIG_HAVE_SPD_IN_CBFS) += spd.c - -ramstage-y += acpi.c -ramstage-y += finalize.c -ramstage-y += gma.c -ramstage-y += memmap.c -romstage-y += memmap.c -postcar-y += memmap.c -ramstage-y += minihd.c -ramstage-y += northbridge.c -ramstage-y += pei_data.c -romstage-y += pei_data.c -ramstage-$(CONFIG_HAVE_REFCODE_BLOB) += refcode.c - -CPPFLAGS_common += -Isrc/soc/intel/broadwell/include - -# If an MRC file is an ELF file determine the entry address and first loadable -# section offset in the file. Subtract the offset from the entry address to -# determine the final location. -mrcelfoffset = $(shell $(READELF_x86_32) -S -W $(CONFIG_MRC_FILE) | sed -e 's/\[ /[0/' | awk '$$3 ~ /PROGBITS/ { print "0x"$$5; exit }' ) -mrcelfentry = $(shell $(READELF_x86_32) -h -W $(CONFIG_MRC_FILE) | grep 'Entry point address' | awk '{print $$NF }') - -# Add memory reference code blob. -cbfs-files-$(CONFIG_HAVE_MRC) += mrc.bin -mrc.bin-file := $(call strip_quotes,$(CONFIG_MRC_FILE)) -mrc.bin-position := $(if $(findstring elf,$(CONFIG_MRC_FILE)),$(shell printf "0x%x" $$(( $(mrcelfentry) - $(mrcelfoffset) )) ),$(CONFIG_MRC_BIN_ADDRESS)) -mrc.bin-type := mrc - -endif diff --git a/src/soc/intel/broadwell/Makefile.mk b/src/soc/intel/broadwell/Makefile.mk new file mode 100644 index 0000000000..3565cd180b --- /dev/null +++ b/src/soc/intel/broadwell/Makefile.mk @@ -0,0 +1,40 @@ +## SPDX-License-Identifier: GPL-2.0-only +ifeq ($(CONFIG_SOC_INTEL_BROADWELL),y) + +subdirs-y += pch + +bootblock-y += bootblock.c + +romstage-y += early_init.c +romstage-y += raminit.c +romstage-y += report_platform.c +romstage-y += romstage.c +romstage-$(CONFIG_HAVE_SPD_IN_CBFS) += spd.c + +ramstage-y += acpi.c +ramstage-y += finalize.c +ramstage-y += gma.c +ramstage-y += memmap.c +romstage-y += memmap.c +postcar-y += memmap.c +ramstage-y += minihd.c +ramstage-y += northbridge.c +ramstage-y += pei_data.c +romstage-y += pei_data.c +ramstage-$(CONFIG_HAVE_REFCODE_BLOB) += refcode.c + +CPPFLAGS_common += -Isrc/soc/intel/broadwell/include + +# If an MRC file is an ELF file determine the entry address and first loadable +# section offset in the file. Subtract the offset from the entry address to +# determine the final location. +mrcelfoffset = $(shell $(READELF_x86_32) -S -W $(CONFIG_MRC_FILE) | sed -e 's/\[ /[0/' | awk '$$3 ~ /PROGBITS/ { print "0x"$$5; exit }' ) +mrcelfentry = $(shell $(READELF_x86_32) -h -W $(CONFIG_MRC_FILE) | grep 'Entry point address' | awk '{print $$NF }') + +# Add memory reference code blob. +cbfs-files-$(CONFIG_HAVE_MRC) += mrc.bin +mrc.bin-file := $(call strip_quotes,$(CONFIG_MRC_FILE)) +mrc.bin-position := $(if $(findstring elf,$(CONFIG_MRC_FILE)),$(shell printf "0x%x" $$(( $(mrcelfentry) - $(mrcelfoffset) )) ),$(CONFIG_MRC_BIN_ADDRESS)) +mrc.bin-type := mrc + +endif diff --git a/src/soc/intel/broadwell/pch/Makefile.inc b/src/soc/intel/broadwell/pch/Makefile.inc deleted file mode 100644 index be2f4a4292..0000000000 --- a/src/soc/intel/broadwell/pch/Makefile.inc +++ /dev/null @@ -1,45 +0,0 @@ -## SPDX-License-Identifier: GPL-2.0-only -bootblock-y += bootblock.c - -ramstage-y += adsp.c -romstage-y += early_pch.c -ramstage-$(CONFIG_ELOG) += elog.c -ramstage-y += finalize.c -ramstage-y += ../../../../southbridge/intel/lynxpoint/lp_gpio.c -romstage-y += ../../../../southbridge/intel/lynxpoint/lp_gpio.c -verstage-y += ../../../../southbridge/intel/lynxpoint/lp_gpio.c -smm-y += ../../../../southbridge/intel/lynxpoint/lp_gpio.c -ramstage-y += hda.c -ramstage-y += ../../../../southbridge/intel/lynxpoint/hda_verb.c -ramstage-y += ../../../../southbridge/intel/lynxpoint/iobp.c -romstage-y += ../../../../southbridge/intel/lynxpoint/iobp.c -ramstage-y += fadt.c -ramstage-y += lpc.c -ramstage-y += me.c -ramstage-y += me_status.c -romstage-y += me_status.c -ramstage-y += pch.c -romstage-y += pch.c -ramstage-y += pcie.c -ramstage-y += pmutil.c -romstage-y += pmutil.c -smm-y += pmutil.c -verstage-y += pmutil.c -romstage-y += power_state.c -ramstage-y += ramstage.c -ramstage-y += sata.c -ramstage-y += serialio.c -ramstage-y += ../../../../southbridge/intel/lynxpoint/smbus.c -ramstage-y += smi.c -smm-y += smihandler.c -bootblock-y += usb_debug.c -romstage-y += usb_debug.c -ramstage-y += usb_debug.c -ramstage-y += usb_ehci.c -ramstage-y += usb_xhci.c -smm-y += usb_xhci.c - -bootblock-$(CONFIG_SERIALIO_UART_CONSOLE) += ../../../../southbridge/intel/lynxpoint/iobp.c -bootblock-$(CONFIG_SERIALIO_UART_CONSOLE) += ../../../../southbridge/intel/lynxpoint/uart_init.c -all-$(CONFIG_SERIALIO_UART_CONSOLE) += ../../../../southbridge/intel/lynxpoint/uart.c -smm-$(CONFIG_SERIALIO_UART_CONSOLE) += ../../../../southbridge/intel/lynxpoint/uart.c diff --git a/src/soc/intel/broadwell/pch/Makefile.mk b/src/soc/intel/broadwell/pch/Makefile.mk new file mode 100644 index 0000000000..be2f4a4292 --- /dev/null +++ b/src/soc/intel/broadwell/pch/Makefile.mk @@ -0,0 +1,45 @@ +## SPDX-License-Identifier: GPL-2.0-only +bootblock-y += bootblock.c + +ramstage-y += adsp.c +romstage-y += early_pch.c +ramstage-$(CONFIG_ELOG) += elog.c +ramstage-y += finalize.c +ramstage-y += ../../../../southbridge/intel/lynxpoint/lp_gpio.c +romstage-y += ../../../../southbridge/intel/lynxpoint/lp_gpio.c +verstage-y += ../../../../southbridge/intel/lynxpoint/lp_gpio.c +smm-y += ../../../../southbridge/intel/lynxpoint/lp_gpio.c +ramstage-y += hda.c +ramstage-y += ../../../../southbridge/intel/lynxpoint/hda_verb.c +ramstage-y += ../../../../southbridge/intel/lynxpoint/iobp.c +romstage-y += ../../../../southbridge/intel/lynxpoint/iobp.c +ramstage-y += fadt.c +ramstage-y += lpc.c +ramstage-y += me.c +ramstage-y += me_status.c +romstage-y += me_status.c +ramstage-y += pch.c +romstage-y += pch.c +ramstage-y += pcie.c +ramstage-y += pmutil.c +romstage-y += pmutil.c +smm-y += pmutil.c +verstage-y += pmutil.c +romstage-y += power_state.c +ramstage-y += ramstage.c +ramstage-y += sata.c +ramstage-y += serialio.c +ramstage-y += ../../../../southbridge/intel/lynxpoint/smbus.c +ramstage-y += smi.c +smm-y += smihandler.c +bootblock-y += usb_debug.c +romstage-y += usb_debug.c +ramstage-y += usb_debug.c +ramstage-y += usb_ehci.c +ramstage-y += usb_xhci.c +smm-y += usb_xhci.c + +bootblock-$(CONFIG_SERIALIO_UART_CONSOLE) += ../../../../southbridge/intel/lynxpoint/iobp.c +bootblock-$(CONFIG_SERIALIO_UART_CONSOLE) += ../../../../southbridge/intel/lynxpoint/uart_init.c +all-$(CONFIG_SERIALIO_UART_CONSOLE) += ../../../../southbridge/intel/lynxpoint/uart.c +smm-$(CONFIG_SERIALIO_UART_CONSOLE) += ../../../../southbridge/intel/lynxpoint/uart.c diff --git a/src/soc/intel/cannonlake/Makefile.inc b/src/soc/intel/cannonlake/Makefile.inc deleted file mode 100644 index 5ae0099990..0000000000 --- a/src/soc/intel/cannonlake/Makefile.inc +++ /dev/null @@ -1,156 +0,0 @@ -## SPDX-License-Identifier: GPL-2.0-only -ifeq ($(CONFIG_SOC_INTEL_CANNONLAKE_BASE),y) - -subdirs-y += romstage -subdirs-y += ../../../cpu/intel/microcode -subdirs-y += ../../../cpu/intel/turbo -subdirs-y += ../../../cpu/intel/common - -bootblock-y += bootblock/bootblock.c -bootblock-y += bootblock/pch.c -bootblock-y += pmutil.c -bootblock-y += bootblock/report_platform.c -bootblock-y += gspi.c -bootblock-y += i2c.c -bootblock-y += spi.c -bootblock-y += lpc.c -bootblock-y += p2sb.c -bootblock-y += uart.c - -romstage-y += cnl_memcfg_init.c -romstage-y += gspi.c -romstage-y += i2c.c -romstage-y += lpc.c -romstage-y += pmutil.c -romstage-y += reset.c -romstage-y += spi.c -romstage-y += uart.c - -ramstage-y += acpi.c -ramstage-y += chip.c -ramstage-y += cpu.c -ramstage-y += elog.c -ramstage-y += finalize.c -ramstage-y += fsp_params.c -ramstage-y += graphics.c -ramstage-y += gspi.c -ramstage-y += i2c.c -ramstage-y += lockdown.c -ramstage-y += lpc.c -ramstage-y += nhlt.c -ramstage-y += p2sb.c -ramstage-y += pmc.c -ramstage-y += pmutil.c -ramstage-y += reset.c -ramstage-y += spi.c -ramstage-y += systemagent.c -ramstage-y += uart.c -ramstage-y += vr_config.c -ramstage-y += sd.c -ramstage-y += xhci.c - -smm-y += elog.c -smm-y += p2sb.c -smm-y += pmutil.c -smm-y += smihandler.c -smm-y += uart.c -smm-y += xhci.c - -postcar-y += pmutil.c -postcar-y += i2c.c -postcar-y += gspi.c -postcar-y += spi.c -postcar-y += uart.c - -verstage-y += gspi.c -verstage-y += i2c.c -verstage-y += pmutil.c -verstage-y += spi.c -verstage-y += uart.c - -ifeq ($(CONFIG_SOC_INTEL_CANNONLAKE_PCH_H),y) -bootblock-y += gpio_cnp_h.c -romstage-y += gpio_cnp_h.c -ramstage-y += gpio_cnp_h.c -smm-y += gpio_cnp_h.c -verstage-y += gpio_cnp_h.c -else -bootblock-y += gpio.c -romstage-y += gpio.c -ramstage-y += gpio.c -smm-y += gpio.c -verstage-y += gpio.c -endif - -bootblock-y += gpio_common.c -ramstage-y += gpio_common.c - -romstage-$(CONFIG_SOC_INTEL_COMETLAKE_1_2) += cometlake_1_2.c -ramstage-$(CONFIG_SOC_INTEL_COMETLAKE_1_2) += cometlake_1_2.c - -ifeq ($(CONFIG_SOC_INTEL_COFFEELAKE),y) -ifeq ($(CONFIG_SOC_INTEL_CANNONLAKE_PCH_H),y) -cpu_microcode_bins += 3rdparty/intel-microcode/intel-ucode/06-9e-0a -cpu_microcode_bins += 3rdparty/intel-microcode/intel-ucode/06-9e-0b -cpu_microcode_bins += 3rdparty/intel-microcode/intel-ucode/06-9e-0c -cpu_microcode_bins += 3rdparty/intel-microcode/intel-ucode/06-9e-0d -else -cpu_microcode_bins += 3rdparty/intel-microcode/intel-ucode/06-8e-0a -endif -else ifeq ($(CONFIG_SOC_INTEL_WHISKEYLAKE),y) -cpu_microcode_bins += 3rdparty/intel-microcode/intel-ucode/06-8e-0b -cpu_microcode_bins += 3rdparty/intel-microcode/intel-ucode/06-8e-0c -else ifeq ($(CONFIG_SOC_INTEL_COMETLAKE),y) -ifeq ($(CONFIG_SOC_INTEL_CANNONLAKE_PCH_H),y) -cpu_microcode_bins += 3rdparty/intel-microcode/intel-ucode/06-a5-02 -cpu_microcode_bins += 3rdparty/intel-microcode/intel-ucode/06-a5-03 -cpu_microcode_bins += 3rdparty/intel-microcode/intel-ucode/06-a5-05 -else -cpu_microcode_bins += 3rdparty/intel-microcode/intel-ucode/06-8e-0c -cpu_microcode_bins += 3rdparty/intel-microcode/intel-ucode/06-a6-00 -cpu_microcode_bins += 3rdparty/intel-microcode/intel-ucode/06-a6-01 -endif -endif - -CPPFLAGS_common += -I$(src)/soc/intel/cannonlake -CPPFLAGS_common += -I$(src)/soc/intel/cannonlake/include - -# DSP firmware settings files. -NHLT_BLOB_PATH = 3rdparty/blobs/soc/intel/cnl/nhlt-blobs -DMIC_1CH_48KHZ_16B = dmic-1ch-48khz-16b.bin -DMIC_2CH_48KHZ_16B = dmic-2ch-48khz-16b.bin -DMIC_4CH_48KHZ_16B = dmic-4ch-48khz-16b.bin -MAX98357_RENDER = max98357-render-2ch-48khz-24b.bin -DA7219_RENDER_CAPTURE = dialog-2ch-48khz-24b.bin -MAX98373_RENDER_24B = max98373-render-2ch-48khz-24b.bin -MAX98373_RENDER_16B = max98373-render-2ch-48khz-16b.bin - -cbfs-files-$(CONFIG_NHLT_DMIC_1CH_16B) += $(DMIC_1CH_48KHZ_16B) -$(DMIC_1CH_48KHZ_16B)-file := $(NHLT_BLOB_PATH)/$(DMIC_1CH_48KHZ_16B) -$(DMIC_1CH_48KHZ_16B)-type := raw - -cbfs-files-$(CONFIG_NHLT_DMIC_2CH_16B) += $(DMIC_2CH_48KHZ_16B) -$(DMIC_2CH_48KHZ_16B)-file := $(NHLT_BLOB_PATH)/$(DMIC_2CH_48KHZ_16B) -$(DMIC_2CH_48KHZ_16B)-type := raw - -cbfs-files-$(CONFIG_NHLT_DMIC_4CH_16B) += $(DMIC_4CH_48KHZ_16B) -$(DMIC_4CH_48KHZ_16B)-file := $(NHLT_BLOB_PATH)/$(DMIC_4CH_48KHZ_16B) -$(DMIC_4CH_48KHZ_16B)-type := raw - -cbfs-files-$(CONFIG_NHLT_MAX98357) += $(MAX98357_RENDER) -$(MAX98357_RENDER)-file := $(NHLT_BLOB_PATH)/$(MAX98357_RENDER) -$(MAX98357_RENDER)-type := raw - -cbfs-files-$(CONFIG_NHLT_MAX98373) += $(MAX98373_RENDER_16B) -$(MAX98373_RENDER_16B)-file := $(NHLT_BLOB_PATH)/$(MAX98373_RENDER_16B) -$(MAX98373_RENDER_16B)-type := raw - -cbfs-files-$(CONFIG_NHLT_MAX98373) += $(MAX98373_RENDER_24B) -$(MAX98373_RENDER_24B)-file := $(NHLT_BLOB_PATH)/$(MAX98373_RENDER_24B) -$(MAX98373_RENDER_24B)-type := raw - -cbfs-files-$(CONFIG_NHLT_DA7219) += $(DA7219_RENDER_CAPTURE) -$(DA7219_RENDER_CAPTURE)-file := $(NHLT_BLOB_PATH)/$(DA7219_RENDER_CAPTURE) -$(DA7219_RENDER_CAPTURE)-type := raw - -endif diff --git a/src/soc/intel/cannonlake/Makefile.mk b/src/soc/intel/cannonlake/Makefile.mk new file mode 100644 index 0000000000..5ae0099990 --- /dev/null +++ b/src/soc/intel/cannonlake/Makefile.mk @@ -0,0 +1,156 @@ +## SPDX-License-Identifier: GPL-2.0-only +ifeq ($(CONFIG_SOC_INTEL_CANNONLAKE_BASE),y) + +subdirs-y += romstage +subdirs-y += ../../../cpu/intel/microcode +subdirs-y += ../../../cpu/intel/turbo +subdirs-y += ../../../cpu/intel/common + +bootblock-y += bootblock/bootblock.c +bootblock-y += bootblock/pch.c +bootblock-y += pmutil.c +bootblock-y += bootblock/report_platform.c +bootblock-y += gspi.c +bootblock-y += i2c.c +bootblock-y += spi.c +bootblock-y += lpc.c +bootblock-y += p2sb.c +bootblock-y += uart.c + +romstage-y += cnl_memcfg_init.c +romstage-y += gspi.c +romstage-y += i2c.c +romstage-y += lpc.c +romstage-y += pmutil.c +romstage-y += reset.c +romstage-y += spi.c +romstage-y += uart.c + +ramstage-y += acpi.c +ramstage-y += chip.c +ramstage-y += cpu.c +ramstage-y += elog.c +ramstage-y += finalize.c +ramstage-y += fsp_params.c +ramstage-y += graphics.c +ramstage-y += gspi.c +ramstage-y += i2c.c +ramstage-y += lockdown.c +ramstage-y += lpc.c +ramstage-y += nhlt.c +ramstage-y += p2sb.c +ramstage-y += pmc.c +ramstage-y += pmutil.c +ramstage-y += reset.c +ramstage-y += spi.c +ramstage-y += systemagent.c +ramstage-y += uart.c +ramstage-y += vr_config.c +ramstage-y += sd.c +ramstage-y += xhci.c + +smm-y += elog.c +smm-y += p2sb.c +smm-y += pmutil.c +smm-y += smihandler.c +smm-y += uart.c +smm-y += xhci.c + +postcar-y += pmutil.c +postcar-y += i2c.c +postcar-y += gspi.c +postcar-y += spi.c +postcar-y += uart.c + +verstage-y += gspi.c +verstage-y += i2c.c +verstage-y += pmutil.c +verstage-y += spi.c +verstage-y += uart.c + +ifeq ($(CONFIG_SOC_INTEL_CANNONLAKE_PCH_H),y) +bootblock-y += gpio_cnp_h.c +romstage-y += gpio_cnp_h.c +ramstage-y += gpio_cnp_h.c +smm-y += gpio_cnp_h.c +verstage-y += gpio_cnp_h.c +else +bootblock-y += gpio.c +romstage-y += gpio.c +ramstage-y += gpio.c +smm-y += gpio.c +verstage-y += gpio.c +endif + +bootblock-y += gpio_common.c +ramstage-y += gpio_common.c + +romstage-$(CONFIG_SOC_INTEL_COMETLAKE_1_2) += cometlake_1_2.c +ramstage-$(CONFIG_SOC_INTEL_COMETLAKE_1_2) += cometlake_1_2.c + +ifeq ($(CONFIG_SOC_INTEL_COFFEELAKE),y) +ifeq ($(CONFIG_SOC_INTEL_CANNONLAKE_PCH_H),y) +cpu_microcode_bins += 3rdparty/intel-microcode/intel-ucode/06-9e-0a +cpu_microcode_bins += 3rdparty/intel-microcode/intel-ucode/06-9e-0b +cpu_microcode_bins += 3rdparty/intel-microcode/intel-ucode/06-9e-0c +cpu_microcode_bins += 3rdparty/intel-microcode/intel-ucode/06-9e-0d +else +cpu_microcode_bins += 3rdparty/intel-microcode/intel-ucode/06-8e-0a +endif +else ifeq ($(CONFIG_SOC_INTEL_WHISKEYLAKE),y) +cpu_microcode_bins += 3rdparty/intel-microcode/intel-ucode/06-8e-0b +cpu_microcode_bins += 3rdparty/intel-microcode/intel-ucode/06-8e-0c +else ifeq ($(CONFIG_SOC_INTEL_COMETLAKE),y) +ifeq ($(CONFIG_SOC_INTEL_CANNONLAKE_PCH_H),y) +cpu_microcode_bins += 3rdparty/intel-microcode/intel-ucode/06-a5-02 +cpu_microcode_bins += 3rdparty/intel-microcode/intel-ucode/06-a5-03 +cpu_microcode_bins += 3rdparty/intel-microcode/intel-ucode/06-a5-05 +else +cpu_microcode_bins += 3rdparty/intel-microcode/intel-ucode/06-8e-0c +cpu_microcode_bins += 3rdparty/intel-microcode/intel-ucode/06-a6-00 +cpu_microcode_bins += 3rdparty/intel-microcode/intel-ucode/06-a6-01 +endif +endif + +CPPFLAGS_common += -I$(src)/soc/intel/cannonlake +CPPFLAGS_common += -I$(src)/soc/intel/cannonlake/include + +# DSP firmware settings files. +NHLT_BLOB_PATH = 3rdparty/blobs/soc/intel/cnl/nhlt-blobs +DMIC_1CH_48KHZ_16B = dmic-1ch-48khz-16b.bin +DMIC_2CH_48KHZ_16B = dmic-2ch-48khz-16b.bin +DMIC_4CH_48KHZ_16B = dmic-4ch-48khz-16b.bin +MAX98357_RENDER = max98357-render-2ch-48khz-24b.bin +DA7219_RENDER_CAPTURE = dialog-2ch-48khz-24b.bin +MAX98373_RENDER_24B = max98373-render-2ch-48khz-24b.bin +MAX98373_RENDER_16B = max98373-render-2ch-48khz-16b.bin + +cbfs-files-$(CONFIG_NHLT_DMIC_1CH_16B) += $(DMIC_1CH_48KHZ_16B) +$(DMIC_1CH_48KHZ_16B)-file := $(NHLT_BLOB_PATH)/$(DMIC_1CH_48KHZ_16B) +$(DMIC_1CH_48KHZ_16B)-type := raw + +cbfs-files-$(CONFIG_NHLT_DMIC_2CH_16B) += $(DMIC_2CH_48KHZ_16B) +$(DMIC_2CH_48KHZ_16B)-file := $(NHLT_BLOB_PATH)/$(DMIC_2CH_48KHZ_16B) +$(DMIC_2CH_48KHZ_16B)-type := raw + +cbfs-files-$(CONFIG_NHLT_DMIC_4CH_16B) += $(DMIC_4CH_48KHZ_16B) +$(DMIC_4CH_48KHZ_16B)-file := $(NHLT_BLOB_PATH)/$(DMIC_4CH_48KHZ_16B) +$(DMIC_4CH_48KHZ_16B)-type := raw + +cbfs-files-$(CONFIG_NHLT_MAX98357) += $(MAX98357_RENDER) +$(MAX98357_RENDER)-file := $(NHLT_BLOB_PATH)/$(MAX98357_RENDER) +$(MAX98357_RENDER)-type := raw + +cbfs-files-$(CONFIG_NHLT_MAX98373) += $(MAX98373_RENDER_16B) +$(MAX98373_RENDER_16B)-file := $(NHLT_BLOB_PATH)/$(MAX98373_RENDER_16B) +$(MAX98373_RENDER_16B)-type := raw + +cbfs-files-$(CONFIG_NHLT_MAX98373) += $(MAX98373_RENDER_24B) +$(MAX98373_RENDER_24B)-file := $(NHLT_BLOB_PATH)/$(MAX98373_RENDER_24B) +$(MAX98373_RENDER_24B)-type := raw + +cbfs-files-$(CONFIG_NHLT_DA7219) += $(DA7219_RENDER_CAPTURE) +$(DA7219_RENDER_CAPTURE)-file := $(NHLT_BLOB_PATH)/$(DA7219_RENDER_CAPTURE) +$(DA7219_RENDER_CAPTURE)-type := raw + +endif diff --git a/src/soc/intel/cannonlake/cnl_memcfg_init.c b/src/soc/intel/cannonlake/cnl_memcfg_init.c index 448e56cc7a..db488ee626 100644 --- a/src/soc/intel/cannonlake/cnl_memcfg_init.c +++ b/src/soc/intel/cannonlake/cnl_memcfg_init.c @@ -74,7 +74,7 @@ static void meminit_spd_data(FSP_M_CONFIG *mem_cfg, uint8_t mem_slot, /* * Initialize default memory settings using the spd file specified by * spd_index. The spd_index is an index into the SPD_SOURCES array defined - * in spd/Makefile.inc. + * in spd/Makefile.mk. */ static void meminit_cbfs_spd_index(FSP_M_CONFIG *mem_cfg, int spd_index, uint8_t mem_slot) diff --git a/src/soc/intel/cannonlake/romstage/Makefile.inc b/src/soc/intel/cannonlake/romstage/Makefile.inc deleted file mode 100644 index 3db91900b7..0000000000 --- a/src/soc/intel/cannonlake/romstage/Makefile.inc +++ /dev/null @@ -1,6 +0,0 @@ -# SPDX-License-Identifier: GPL-2.0-only - -romstage-y += ../../../../cpu/intel/car/romstage.c -romstage-y += romstage.c -romstage-y += fsp_params.c -romstage-y += systemagent.c diff --git a/src/soc/intel/cannonlake/romstage/Makefile.mk b/src/soc/intel/cannonlake/romstage/Makefile.mk new file mode 100644 index 0000000000..3db91900b7 --- /dev/null +++ b/src/soc/intel/cannonlake/romstage/Makefile.mk @@ -0,0 +1,6 @@ +# SPDX-License-Identifier: GPL-2.0-only + +romstage-y += ../../../../cpu/intel/car/romstage.c +romstage-y += romstage.c +romstage-y += fsp_params.c +romstage-y += systemagent.c diff --git a/src/soc/intel/common/Makefile.inc b/src/soc/intel/common/Makefile.inc deleted file mode 100644 index b273ed7c12..0000000000 --- a/src/soc/intel/common/Makefile.inc +++ /dev/null @@ -1,81 +0,0 @@ -## SPDX-License-Identifier: GPL-2.0-only -ifeq ($(CONFIG_SOC_INTEL_COMMON),y) - -subdirs-y += basecode/ -subdirs-y += block/ -subdirs-y += pch/ - -verstage-$(CONFIG_SOC_INTEL_COMMON_RESET) += reset.c - -bootblock-$(CONFIG_SOC_INTEL_COMMON_RESET) += reset.c - -romstage-$(CONFIG_SOC_INTEL_COMMON_RESET) += reset.c -romstage-$(CONFIG_MMA) += mma.c -romstage-y += smbios.c - -postcar-$(CONFIG_SOC_INTEL_COMMON_RESET) += reset.c - -ramstage-y += hda_verb.c -ramstage-$(CONFIG_SOC_INTEL_COMMON_RESET) += reset.c -ramstage-$(CONFIG_MMA) += mma.c -ramstage-y += vbt.c -ramstage-$(CONFIG_SOC_INTEL_COMMON_NHLT) += nhlt.c - -all-$(CONFIG_TPM_GOOGLE) += tpm_tis.c - -romstage-$(CONFIG_SOC_INTEL_COMMON_FSP_RESET) += fsp_reset.c -ramstage-$(CONFIG_SOC_INTEL_COMMON_FSP_RESET) += fsp_reset.c - -ifeq ($(CONFIG_MMA),y) -MMA_BLOBS_PATH = $(call strip_quotes,$(CONFIG_MMA_BLOBS_PATH)) -MMA_TEST_NAMES = $(notdir $(wildcard $(MMA_BLOBS_PATH)/tests/*)) -MMA_TEST_CONFIG_NAMES = $(notdir $(wildcard $(MMA_BLOBS_PATH)/configs/*)) - -# -# MMA_CBFS_template is the template to be expanded by eval -# where $(1) is file name -# $(2) is file path -# $(3) is file type, efi for test names (all .EFI files under $(MMA_BLOBS_PATH)/tests ) -# , mma for test param (all .BIN files under $(MMA_BLOBS_PATH)/configs/) -# -# $(MMA_BLOBS_PATH)/tests/.efi has corresponding test params -# at $(MMA_BLOBS_PATH)/configs//.bin -# - - -define MMA_CBFS_template = - cbfs-files-y += $(1) - $(1)-file := $(MMA_BLOBS_PATH)/$(2)/$(1) - $(1)-type := $(3) -endef - -# -# following loop calls MMA_CBFS_template for each .EFI file under $(MMA_BLOBS_PATH)/tests with type = efi -# -$(foreach mma_test,$(MMA_TEST_NAMES),$(eval $(call MMA_CBFS_template,$(mma_test),tests,efi))) - - -# -# following nested loops calls MMA_CBFS_template for each .BIN file under each MMA_TEST_CONFIG_NAMES -# -# foreach do following -# foreach .bin in do following -# call MMA_CBFS_template for each .bin under current with type = mma -# - -$(foreach mma_test, $(MMA_TEST_CONFIG_NAMES),\ - $(eval $(foreach mma_config,$(notdir $(wildcard $(MMA_BLOBS_PATH)/configs/$(mma_test)/*)),\ - $(eval $(call MMA_CBFS_template,$(mma_config),configs/$(mma_test),mma))))) - -endif - -# SI_DESC contains soft straps that may modify security-relevant behavior, so it should be -# verified by GSCVD. -vboot-gscvd-ranges += $(shell ( \ - offset=$$($(call fmap-section-offset-cmd,SI_DESC)) ;\ - if [ -n "$$offset" ]; then \ - printf "%x:%x" $$offset $$($(call fmap-section-size-cmd,SI_DESC)) ;\ - fi ;\ -)) - -endif diff --git a/src/soc/intel/common/Makefile.mk b/src/soc/intel/common/Makefile.mk new file mode 100644 index 0000000000..b273ed7c12 --- /dev/null +++ b/src/soc/intel/common/Makefile.mk @@ -0,0 +1,81 @@ +## SPDX-License-Identifier: GPL-2.0-only +ifeq ($(CONFIG_SOC_INTEL_COMMON),y) + +subdirs-y += basecode/ +subdirs-y += block/ +subdirs-y += pch/ + +verstage-$(CONFIG_SOC_INTEL_COMMON_RESET) += reset.c + +bootblock-$(CONFIG_SOC_INTEL_COMMON_RESET) += reset.c + +romstage-$(CONFIG_SOC_INTEL_COMMON_RESET) += reset.c +romstage-$(CONFIG_MMA) += mma.c +romstage-y += smbios.c + +postcar-$(CONFIG_SOC_INTEL_COMMON_RESET) += reset.c + +ramstage-y += hda_verb.c +ramstage-$(CONFIG_SOC_INTEL_COMMON_RESET) += reset.c +ramstage-$(CONFIG_MMA) += mma.c +ramstage-y += vbt.c +ramstage-$(CONFIG_SOC_INTEL_COMMON_NHLT) += nhlt.c + +all-$(CONFIG_TPM_GOOGLE) += tpm_tis.c + +romstage-$(CONFIG_SOC_INTEL_COMMON_FSP_RESET) += fsp_reset.c +ramstage-$(CONFIG_SOC_INTEL_COMMON_FSP_RESET) += fsp_reset.c + +ifeq ($(CONFIG_MMA),y) +MMA_BLOBS_PATH = $(call strip_quotes,$(CONFIG_MMA_BLOBS_PATH)) +MMA_TEST_NAMES = $(notdir $(wildcard $(MMA_BLOBS_PATH)/tests/*)) +MMA_TEST_CONFIG_NAMES = $(notdir $(wildcard $(MMA_BLOBS_PATH)/configs/*)) + +# +# MMA_CBFS_template is the template to be expanded by eval +# where $(1) is file name +# $(2) is file path +# $(3) is file type, efi for test names (all .EFI files under $(MMA_BLOBS_PATH)/tests ) +# , mma for test param (all .BIN files under $(MMA_BLOBS_PATH)/configs/) +# +# $(MMA_BLOBS_PATH)/tests/.efi has corresponding test params +# at $(MMA_BLOBS_PATH)/configs//.bin +# + + +define MMA_CBFS_template = + cbfs-files-y += $(1) + $(1)-file := $(MMA_BLOBS_PATH)/$(2)/$(1) + $(1)-type := $(3) +endef + +# +# following loop calls MMA_CBFS_template for each .EFI file under $(MMA_BLOBS_PATH)/tests with type = efi +# +$(foreach mma_test,$(MMA_TEST_NAMES),$(eval $(call MMA_CBFS_template,$(mma_test),tests,efi))) + + +# +# following nested loops calls MMA_CBFS_template for each .BIN file under each MMA_TEST_CONFIG_NAMES +# +# foreach do following +# foreach .bin in do following +# call MMA_CBFS_template for each .bin under current with type = mma +# + +$(foreach mma_test, $(MMA_TEST_CONFIG_NAMES),\ + $(eval $(foreach mma_config,$(notdir $(wildcard $(MMA_BLOBS_PATH)/configs/$(mma_test)/*)),\ + $(eval $(call MMA_CBFS_template,$(mma_config),configs/$(mma_test),mma))))) + +endif + +# SI_DESC contains soft straps that may modify security-relevant behavior, so it should be +# verified by GSCVD. +vboot-gscvd-ranges += $(shell ( \ + offset=$$($(call fmap-section-offset-cmd,SI_DESC)) ;\ + if [ -n "$$offset" ]; then \ + printf "%x:%x" $$offset $$($(call fmap-section-size-cmd,SI_DESC)) ;\ + fi ;\ +)) + +endif diff --git a/src/soc/intel/common/basecode/Makefile.inc b/src/soc/intel/common/basecode/Makefile.inc deleted file mode 100644 index 4037484cf8..0000000000 --- a/src/soc/intel/common/basecode/Makefile.inc +++ /dev/null @@ -1,8 +0,0 @@ -## SPDX-License-Identifier: GPL-2.0-only -ifeq ($(CONFIG_SOC_INTEL_COMMON_BASECODE),y) - -subdirs-y += ./* - -CPPFLAGS_common += -I$(src)/soc/intel/common/basecode/include/ - -endif diff --git a/src/soc/intel/common/basecode/Makefile.mk b/src/soc/intel/common/basecode/Makefile.mk new file mode 100644 index 0000000000..4037484cf8 --- /dev/null +++ b/src/soc/intel/common/basecode/Makefile.mk @@ -0,0 +1,8 @@ +## SPDX-License-Identifier: GPL-2.0-only +ifeq ($(CONFIG_SOC_INTEL_COMMON_BASECODE),y) + +subdirs-y += ./* + +CPPFLAGS_common += -I$(src)/soc/intel/common/basecode/include/ + +endif diff --git a/src/soc/intel/common/basecode/debug/Makefile.inc b/src/soc/intel/common/basecode/debug/Makefile.inc deleted file mode 100644 index 9cf4b2bc2f..0000000000 --- a/src/soc/intel/common/basecode/debug/Makefile.inc +++ /dev/null @@ -1,3 +0,0 @@ -## SPDX-License-Identifier: GPL-2.0-only -romstage-$(CONFIG_SOC_INTEL_COMMON_BASECODE_DEBUG_FEATURE) += debug_feature.c -ramstage-$(CONFIG_SOC_INTEL_COMMON_BASECODE_DEBUG_FEATURE) += debug_feature.c diff --git a/src/soc/intel/common/basecode/debug/Makefile.mk b/src/soc/intel/common/basecode/debug/Makefile.mk new file mode 100644 index 0000000000..9cf4b2bc2f --- /dev/null +++ b/src/soc/intel/common/basecode/debug/Makefile.mk @@ -0,0 +1,3 @@ +## SPDX-License-Identifier: GPL-2.0-only +romstage-$(CONFIG_SOC_INTEL_COMMON_BASECODE_DEBUG_FEATURE) += debug_feature.c +ramstage-$(CONFIG_SOC_INTEL_COMMON_BASECODE_DEBUG_FEATURE) += debug_feature.c diff --git a/src/soc/intel/common/basecode/ramtop/Makefile.inc b/src/soc/intel/common/basecode/ramtop/Makefile.inc deleted file mode 100644 index 4585173b91..0000000000 --- a/src/soc/intel/common/basecode/ramtop/Makefile.inc +++ /dev/null @@ -1,2 +0,0 @@ -## SPDX-License-Identifier: GPL-2.0-only -romstage-$(CONFIG_SOC_INTEL_COMMON_BASECODE_RAMTOP) += ramtop.c diff --git a/src/soc/intel/common/basecode/ramtop/Makefile.mk b/src/soc/intel/common/basecode/ramtop/Makefile.mk new file mode 100644 index 0000000000..4585173b91 --- /dev/null +++ b/src/soc/intel/common/basecode/ramtop/Makefile.mk @@ -0,0 +1,2 @@ +## SPDX-License-Identifier: GPL-2.0-only +romstage-$(CONFIG_SOC_INTEL_COMMON_BASECODE_RAMTOP) += ramtop.c diff --git a/src/soc/intel/common/block/Makefile.inc b/src/soc/intel/common/block/Makefile.inc deleted file mode 100644 index ab1971f58e..0000000000 --- a/src/soc/intel/common/block/Makefile.inc +++ /dev/null @@ -1,8 +0,0 @@ -## SPDX-License-Identifier: GPL-2.0-only -ifeq ($(CONFIG_SOC_INTEL_COMMON_BLOCK),y) - -subdirs-y += ./* - -CPPFLAGS_common += -I$(src)/soc/intel/common/block/include/ - -endif diff --git a/src/soc/intel/common/block/Makefile.mk b/src/soc/intel/common/block/Makefile.mk new file mode 100644 index 0000000000..ab1971f58e --- /dev/null +++ b/src/soc/intel/common/block/Makefile.mk @@ -0,0 +1,8 @@ +## SPDX-License-Identifier: GPL-2.0-only +ifeq ($(CONFIG_SOC_INTEL_COMMON_BLOCK),y) + +subdirs-y += ./* + +CPPFLAGS_common += -I$(src)/soc/intel/common/block/include/ + +endif diff --git a/src/soc/intel/common/block/acpi/Makefile.inc b/src/soc/intel/common/block/acpi/Makefile.inc deleted file mode 100644 index 0375ce9c09..0000000000 --- a/src/soc/intel/common/block/acpi/Makefile.inc +++ /dev/null @@ -1,9 +0,0 @@ -## SPDX-License-Identifier: GPL-2.0-only -ramstage-$(CONFIG_SOC_INTEL_COMMON_BLOCK_ACPI) += acpi.c -ramstage-$(CONFIG_SOC_INTEL_COMMON_BLOCK_ACPI_GPIO) += gpio.c -ramstage-$(CONFIG_SOC_INTEL_COMMON_BLOCK_ACPI_LPIT) += lpit.c -ramstage-$(CONFIG_ACPI_BERT) += acpi_bert.c -ramstage-$(CONFIG_SOC_INTEL_COMMON_ACPI_WAKE_SOURCE) += acpi_wake_source.c -ramstage-$(CONFIG_SOC_INTEL_COMMON_BLOCK_ACPI_PEP) += pep.c -ramstage-$(CONFIG_SOC_INTEL_COMMON_BLOCK_SGX_ENABLE) += sgx.c -ramstage-$(CONFIG_SOC_INTEL_COMMON_BLOCK_ACPI_CPU_HYBRID) += cpu_hybrid.c diff --git a/src/soc/intel/common/block/acpi/Makefile.mk b/src/soc/intel/common/block/acpi/Makefile.mk new file mode 100644 index 0000000000..0375ce9c09 --- /dev/null +++ b/src/soc/intel/common/block/acpi/Makefile.mk @@ -0,0 +1,9 @@ +## SPDX-License-Identifier: GPL-2.0-only +ramstage-$(CONFIG_SOC_INTEL_COMMON_BLOCK_ACPI) += acpi.c +ramstage-$(CONFIG_SOC_INTEL_COMMON_BLOCK_ACPI_GPIO) += gpio.c +ramstage-$(CONFIG_SOC_INTEL_COMMON_BLOCK_ACPI_LPIT) += lpit.c +ramstage-$(CONFIG_ACPI_BERT) += acpi_bert.c +ramstage-$(CONFIG_SOC_INTEL_COMMON_ACPI_WAKE_SOURCE) += acpi_wake_source.c +ramstage-$(CONFIG_SOC_INTEL_COMMON_BLOCK_ACPI_PEP) += pep.c +ramstage-$(CONFIG_SOC_INTEL_COMMON_BLOCK_SGX_ENABLE) += sgx.c +ramstage-$(CONFIG_SOC_INTEL_COMMON_BLOCK_ACPI_CPU_HYBRID) += cpu_hybrid.c diff --git a/src/soc/intel/common/block/chip/Makefile.inc b/src/soc/intel/common/block/chip/Makefile.inc deleted file mode 100644 index 3f6d7d8610..0000000000 --- a/src/soc/intel/common/block/chip/Makefile.inc +++ /dev/null @@ -1,11 +0,0 @@ -## SPDX-License-Identifier: GPL-2.0-only -ifeq ($(CONFIG_SOC_INTEL_COMMON_BLOCK_CHIP_CONFIG),y) - -bootblock-y += chip.c -romstage-y += chip.c -verstage-y += chip.c -ramstage-y += chip.c -smm-y += chip.c -postcar-y += chip.c - -endif diff --git a/src/soc/intel/common/block/chip/Makefile.mk b/src/soc/intel/common/block/chip/Makefile.mk new file mode 100644 index 0000000000..3f6d7d8610 --- /dev/null +++ b/src/soc/intel/common/block/chip/Makefile.mk @@ -0,0 +1,11 @@ +## SPDX-License-Identifier: GPL-2.0-only +ifeq ($(CONFIG_SOC_INTEL_COMMON_BLOCK_CHIP_CONFIG),y) + +bootblock-y += chip.c +romstage-y += chip.c +verstage-y += chip.c +ramstage-y += chip.c +smm-y += chip.c +postcar-y += chip.c + +endif diff --git a/src/soc/intel/common/block/cnvi/Makefile.inc b/src/soc/intel/common/block/cnvi/Makefile.inc deleted file mode 100644 index d21fad3859..0000000000 --- a/src/soc/intel/common/block/cnvi/Makefile.inc +++ /dev/null @@ -1,2 +0,0 @@ -## SPDX-License-Identifier: GPL-2.0-only -ramstage-$(CONFIG_SOC_INTEL_COMMON_BLOCK_CNVI) += cnvi.c diff --git a/src/soc/intel/common/block/cnvi/Makefile.mk b/src/soc/intel/common/block/cnvi/Makefile.mk new file mode 100644 index 0000000000..d21fad3859 --- /dev/null +++ b/src/soc/intel/common/block/cnvi/Makefile.mk @@ -0,0 +1,2 @@ +## SPDX-License-Identifier: GPL-2.0-only +ramstage-$(CONFIG_SOC_INTEL_COMMON_BLOCK_CNVI) += cnvi.c diff --git a/src/soc/intel/common/block/cpu/Makefile.inc b/src/soc/intel/common/block/cpu/Makefile.inc deleted file mode 100644 index 8dd6796d59..0000000000 --- a/src/soc/intel/common/block/cpu/Makefile.inc +++ /dev/null @@ -1,20 +0,0 @@ -## SPDX-License-Identifier: GPL-2.0-only -ifeq ($(CONFIG_FSP_CAR),y) -bootblock-$(CONFIG_SOC_INTEL_COMMON_BLOCK_CPU)+= car/cache_as_ram_fsp.S -ifeq ($(CONFIG_NO_FSP_TEMP_RAM_EXIT),y) -postcar-$(CONFIG_SOC_INTEL_COMMON_BLOCK_CPU) += car/exit_car.S -else -postcar-$(CONFIG_SOC_INTEL_COMMON_BLOCK_CPU) += car/exit_car_fsp.S -endif -else -bootblock-$(CONFIG_SOC_INTEL_COMMON_BLOCK_CAR) += car/cache_as_ram.S -bootblock-$(CONFIG_SOC_INTEL_COMMON_BLOCK_CAR) += ../../../../../cpu/x86/early_reset.S -postcar-$(CONFIG_SOC_INTEL_COMMON_BLOCK_CAR) += car/exit_car.S -endif - -bootblock-$(CONFIG_SOC_INTEL_COMMON_BLOCK_CPU) += cpulib.c -romstage-$(CONFIG_SOC_INTEL_COMMON_BLOCK_CPU) += cpulib.c -ramstage-$(CONFIG_SOC_INTEL_COMMON_BLOCK_CPU) += cpulib.c -ramstage-$(CONFIG_SOC_INTEL_COMMON_BLOCK_CPU_MPINIT) += mp_init.c -ramstage-$(CONFIG_CPU_SUPPORTS_PM_TIMER_EMULATION) += pm_timer_emulation.c -ramstage-$(CONFIG_SOC_INTEL_COMMON_BLOCK_CPU_SMMRELOCATE) += smmrelocate.c diff --git a/src/soc/intel/common/block/cpu/Makefile.mk b/src/soc/intel/common/block/cpu/Makefile.mk new file mode 100644 index 0000000000..8dd6796d59 --- /dev/null +++ b/src/soc/intel/common/block/cpu/Makefile.mk @@ -0,0 +1,20 @@ +## SPDX-License-Identifier: GPL-2.0-only +ifeq ($(CONFIG_FSP_CAR),y) +bootblock-$(CONFIG_SOC_INTEL_COMMON_BLOCK_CPU)+= car/cache_as_ram_fsp.S +ifeq ($(CONFIG_NO_FSP_TEMP_RAM_EXIT),y) +postcar-$(CONFIG_SOC_INTEL_COMMON_BLOCK_CPU) += car/exit_car.S +else +postcar-$(CONFIG_SOC_INTEL_COMMON_BLOCK_CPU) += car/exit_car_fsp.S +endif +else +bootblock-$(CONFIG_SOC_INTEL_COMMON_BLOCK_CAR) += car/cache_as_ram.S +bootblock-$(CONFIG_SOC_INTEL_COMMON_BLOCK_CAR) += ../../../../../cpu/x86/early_reset.S +postcar-$(CONFIG_SOC_INTEL_COMMON_BLOCK_CAR) += car/exit_car.S +endif + +bootblock-$(CONFIG_SOC_INTEL_COMMON_BLOCK_CPU) += cpulib.c +romstage-$(CONFIG_SOC_INTEL_COMMON_BLOCK_CPU) += cpulib.c +ramstage-$(CONFIG_SOC_INTEL_COMMON_BLOCK_CPU) += cpulib.c +ramstage-$(CONFIG_SOC_INTEL_COMMON_BLOCK_CPU_MPINIT) += mp_init.c +ramstage-$(CONFIG_CPU_SUPPORTS_PM_TIMER_EMULATION) += pm_timer_emulation.c +ramstage-$(CONFIG_SOC_INTEL_COMMON_BLOCK_CPU_SMMRELOCATE) += smmrelocate.c diff --git a/src/soc/intel/common/block/crashlog/Makefile.inc b/src/soc/intel/common/block/crashlog/Makefile.inc deleted file mode 100644 index 1f101c5c7e..0000000000 --- a/src/soc/intel/common/block/crashlog/Makefile.inc +++ /dev/null @@ -1,2 +0,0 @@ -## SPDX-License-Identifier: GPL-2.0-only -ramstage-$(CONFIG_SOC_INTEL_COMMON_BLOCK_CRASHLOG) += crashlog.c diff --git a/src/soc/intel/common/block/crashlog/Makefile.mk b/src/soc/intel/common/block/crashlog/Makefile.mk new file mode 100644 index 0000000000..1f101c5c7e --- /dev/null +++ b/src/soc/intel/common/block/crashlog/Makefile.mk @@ -0,0 +1,2 @@ +## SPDX-License-Identifier: GPL-2.0-only +ramstage-$(CONFIG_SOC_INTEL_COMMON_BLOCK_CRASHLOG) += crashlog.c diff --git a/src/soc/intel/common/block/cse/Makefile.inc b/src/soc/intel/common/block/cse/Makefile.inc deleted file mode 100644 index 33277571f6..0000000000 --- a/src/soc/intel/common/block/cse/Makefile.inc +++ /dev/null @@ -1,125 +0,0 @@ -## SPDX-License-Identifier: GPL-2.0-only -romstage-$(CONFIG_SOC_INTEL_COMMON_BLOCK_CSE) += cse.c -ramstage-$(CONFIG_SOC_INTEL_COMMON_BLOCK_CSE) += cse.c -romstage-$(CONFIG_SOC_INTEL_CSE_LITE_SKU) += cse_lite.c -ramstage-$(CONFIG_SOC_INTEL_CSE_LITE_SKU) += cse_lite.c -ramstage-$(CONFIG_SOC_INTEL_CSE_LITE_SKU) += cse_lite_cmos.c -romstage-$(CONFIG_SOC_INTEL_CSE_LITE_SKU) += cse_lite_cmos.c -ramstage-$(CONFIG_SOC_INTEL_CSE_HAVE_SPEC_SUPPORT) += cse_spec.c -ramstage-$(CONFIG_SOC_INTEL_COMMON_BLOCK_CSE) += disable_heci.c -smm-$(CONFIG_SOC_INTEL_COMMON_BLOCK_CSE) += disable_heci.c -ramstage-$(CONFIG_SOC_INTEL_CSE_SET_EOP) += cse_eop.c -romstage-$(CONFIG_SOC_INTEL_CSE_PRE_CPU_RESET_TELEMETRY) += telemetry.c - -ifeq ($(CONFIG_STITCH_ME_BIN),y) - -CSE_BP1_BIN := $(objcse)/cse_bp1.bin -CSE_BP2_BIN := $(objcse)/cse_bp2.bin -CSE_LAYOUT_BIN := $(objcse)/cse_layout.bin -CSE_RW_FILE := $(CSE_BP2_BIN) - -CSE_BPDT_VERSION := $(call strip_quotes,$(CONFIG_CSE_BPDT_VERSION)) -ifeq ($(CONFIG_CSE_BPDT_VERSION),) -$(error "CONFIG_CSE_BPDT_VERSION is not set!") -endif - -CSE_FPT_INPUT=$(call cse_input_path,$(CONFIG_CSE_FPT_FILE)) -CSE_DATA_INPUT=$(call cse_input_path,$(CONFIG_CSE_DATA_FILE)) - -get_cse_region_offset=$(call int-subtract,$(call get_fmap_value,$(1)) $(CSE_LAYOUT_OFFSET)) - -CSE_LAYOUT_OFFSET=$(call get_fmap_value,FMAP_SECTION_CSE_LAYOUT_START) -CSE_BP1_OFFSET=$(call get_cse_region_offset,FMAP_SECTION_CSE_RO_START) -CSE_BP1_SIZE=$(call get_fmap_value,FMAP_SECTION_CSE_RO_SIZE) -CSE_BP2_OFFSET=$(call get_cse_region_offset,FMAP_SECTION_CSE_RW_START) -CSE_BP2_SIZE=$(call get_fmap_value,FMAP_SECTION_CSE_RW_SIZE) -CSE_DP_OFFSET=$(call get_cse_region_offset,FMAP_SECTION_CSE_DATA_START) -CSE_DP_SIZE=$(call get_fmap_value,FMAP_SECTION_CSE_DATA_SIZE) - -.PHONY: cse_inputs -cse_inputs: $(cse_input_files) - -$(cse_decomp_files): $(CSE_FPT_INPUT) $(CSE_FPT) - printf " DUMP $(@F)\n" - $(CSE_FPT) $< dump -o $(objcse) -n $(@F) > /dev/null - -define cse_add_ingredient - $(if $($(2)-file), \ - printf " CSEADD $(2) ($($(2)-file)) -> $(1)\n"; - $(CSE_SERGER) $@ add -n $(2) -f $($(2)-file) > /dev/null, - printf " CSEADD $(2) (dummy) -> $(1)\n"; - $(CSE_SERGER) $@ add -n $(2) > /dev/null) -endef - -$(objcse)/cse_%.bin: $(CSE_SERGER) cse_inputs $(cse_decomp_files) - printf " CREATE $(@F) (version $(CSE_BPDT_VERSION))\n" - $(CSE_SERGER) $@ create-bpdt -v $(CSE_BPDT_VERSION) > /dev/null - $(foreach ingredient,$(cse_$*_ingredients),\ - $(call cse_add_ingredient,$(@F),$(ingredient));) - -$(OBJ_ME_BIN): $(CSE_BP1_BIN) $(CSE_BP2_BIN) $(CSE_DATA_INPUT) $(obj)/fmap_config.h - printf " CREATE $(@F)\n" - $(CSE_SERGER) $@ create-cse-region -v $(CSE_BPDT_VERSION) \ - --bp1 $(CSE_BP1_OFFSET):$(CSE_BP1_SIZE) --bp1_file $(CSE_BP1_BIN) \ - --bp2 $(CSE_BP2_OFFSET):$(CSE_BP2_SIZE) --bp2_file $(CSE_BP2_BIN) \ - --dp $(CSE_DP_OFFSET):$(CSE_DP_SIZE) --dp_file $(CSE_DATA_INPUT) > /dev/null - -endif - -ifeq ($(CONFIG_SOC_INTEL_CSE_RW_UPDATE),y) - -ifeq ($(CONFIG_SOC_INTEL_CSE_RW_VERSION),"") -$(error "CSE RW version is missing and need to be set by mainboard config") -endif - -ifneq ($(CONFIG_STITCH_ME_BIN),y) - -ifeq ($(CONFIG_SOC_INTEL_CSE_RW_FILE),"") -$(error "CSE RW file path is missing and need to be set by mainboard config") -endif -CSE_RW_FILE := $(call strip_quotes,$(CONFIG_SOC_INTEL_CSE_RW_FILE)) - -endif - -CSE_LITE_ME_RW = $(call strip_quotes,$(CONFIG_SOC_INTEL_CSE_RW_CBFS_NAME)) - -regions-for-file-$(CSE_LITE_ME_RW) = FW_MAIN_A,FW_MAIN_B - -cbfs-files-y += $(CSE_LITE_ME_RW) -$(CSE_LITE_ME_RW)-file := $(CSE_RW_FILE) -$(CSE_LITE_ME_RW)-name := $(CSE_LITE_ME_RW) -$(CSE_LITE_ME_RW)-type := raw -ifeq ($(CONFIG_SOC_INTEL_CSE_LITE_COMPRESS_ME_RW),y) -$(CSE_LITE_ME_RW)-compression := LZMA -endif - -$(obj)/cse_rw.version: - @echo '$(call strip_quotes,$(CONFIG_SOC_INTEL_CSE_RW_VERSION))' > $@ - -CSE_RW_VERSION = $(call strip_quotes,$(CONFIG_SOC_INTEL_CSE_RW_VERSION_CBFS_NAME)) -regions-for-file-$(CSE_RW_VERSION) = FW_MAIN_A,FW_MAIN_B -cbfs-files-y += $(CSE_RW_VERSION) -$(CSE_RW_VERSION)-file := $(obj)/cse_rw.version -$(CSE_RW_VERSION)-name := $(CSE_RW_VERSION) -$(CSE_RW_VERSION)-type := raw - -endif - -ifeq ($(CONFIG_SOC_INTEL_CSE_SUB_PART_UPDATE),y) - -CSE_IOM_FILE = $(call strip_quotes,$(CONFIG_SOC_INTEL_CSE_IOM_CBFS_FILE)) -CSE_IOM = $(call strip_quotes,$(CONFIG_SOC_INTEL_CSE_IOM_CBFS_NAME)) -regions-for-file-$(CSE_IOM) = FW_MAIN_A,FW_MAIN_B,COREBOOT -cbfs-files-y += $(CSE_IOM) -$(CSE_IOM)-file := $(CSE_IOM_FILE) -$(CSE_IOM)-name := $(CSE_IOM) -$(CSE_IOM)-type := raw - -CSE_NPHY_FILE = $(call strip_quotes,$(CONFIG_SOC_INTEL_CSE_NPHY_CBFS_FILE)) -CSE_NPHY = $(call strip_quotes,$(CONFIG_SOC_INTEL_CSE_NPHY_CBFS_NAME)) -regions-for-file-$(CSE_NPHY) = FW_MAIN_A,FW_MAIN_B,COREBOOT -cbfs-files-y += $(CSE_NPHY) -$(CSE_NPHY)-file := $(CSE_NPHY_FILE) -$(CSE_NPHY)-name := $(CSE_NPHY) -$(CSE_NPHY)-type := raw -endif diff --git a/src/soc/intel/common/block/cse/Makefile.mk b/src/soc/intel/common/block/cse/Makefile.mk new file mode 100644 index 0000000000..33277571f6 --- /dev/null +++ b/src/soc/intel/common/block/cse/Makefile.mk @@ -0,0 +1,125 @@ +## SPDX-License-Identifier: GPL-2.0-only +romstage-$(CONFIG_SOC_INTEL_COMMON_BLOCK_CSE) += cse.c +ramstage-$(CONFIG_SOC_INTEL_COMMON_BLOCK_CSE) += cse.c +romstage-$(CONFIG_SOC_INTEL_CSE_LITE_SKU) += cse_lite.c +ramstage-$(CONFIG_SOC_INTEL_CSE_LITE_SKU) += cse_lite.c +ramstage-$(CONFIG_SOC_INTEL_CSE_LITE_SKU) += cse_lite_cmos.c +romstage-$(CONFIG_SOC_INTEL_CSE_LITE_SKU) += cse_lite_cmos.c +ramstage-$(CONFIG_SOC_INTEL_CSE_HAVE_SPEC_SUPPORT) += cse_spec.c +ramstage-$(CONFIG_SOC_INTEL_COMMON_BLOCK_CSE) += disable_heci.c +smm-$(CONFIG_SOC_INTEL_COMMON_BLOCK_CSE) += disable_heci.c +ramstage-$(CONFIG_SOC_INTEL_CSE_SET_EOP) += cse_eop.c +romstage-$(CONFIG_SOC_INTEL_CSE_PRE_CPU_RESET_TELEMETRY) += telemetry.c + +ifeq ($(CONFIG_STITCH_ME_BIN),y) + +CSE_BP1_BIN := $(objcse)/cse_bp1.bin +CSE_BP2_BIN := $(objcse)/cse_bp2.bin +CSE_LAYOUT_BIN := $(objcse)/cse_layout.bin +CSE_RW_FILE := $(CSE_BP2_BIN) + +CSE_BPDT_VERSION := $(call strip_quotes,$(CONFIG_CSE_BPDT_VERSION)) +ifeq ($(CONFIG_CSE_BPDT_VERSION),) +$(error "CONFIG_CSE_BPDT_VERSION is not set!") +endif + +CSE_FPT_INPUT=$(call cse_input_path,$(CONFIG_CSE_FPT_FILE)) +CSE_DATA_INPUT=$(call cse_input_path,$(CONFIG_CSE_DATA_FILE)) + +get_cse_region_offset=$(call int-subtract,$(call get_fmap_value,$(1)) $(CSE_LAYOUT_OFFSET)) + +CSE_LAYOUT_OFFSET=$(call get_fmap_value,FMAP_SECTION_CSE_LAYOUT_START) +CSE_BP1_OFFSET=$(call get_cse_region_offset,FMAP_SECTION_CSE_RO_START) +CSE_BP1_SIZE=$(call get_fmap_value,FMAP_SECTION_CSE_RO_SIZE) +CSE_BP2_OFFSET=$(call get_cse_region_offset,FMAP_SECTION_CSE_RW_START) +CSE_BP2_SIZE=$(call get_fmap_value,FMAP_SECTION_CSE_RW_SIZE) +CSE_DP_OFFSET=$(call get_cse_region_offset,FMAP_SECTION_CSE_DATA_START) +CSE_DP_SIZE=$(call get_fmap_value,FMAP_SECTION_CSE_DATA_SIZE) + +.PHONY: cse_inputs +cse_inputs: $(cse_input_files) + +$(cse_decomp_files): $(CSE_FPT_INPUT) $(CSE_FPT) + printf " DUMP $(@F)\n" + $(CSE_FPT) $< dump -o $(objcse) -n $(@F) > /dev/null + +define cse_add_ingredient + $(if $($(2)-file), \ + printf " CSEADD $(2) ($($(2)-file)) -> $(1)\n"; + $(CSE_SERGER) $@ add -n $(2) -f $($(2)-file) > /dev/null, + printf " CSEADD $(2) (dummy) -> $(1)\n"; + $(CSE_SERGER) $@ add -n $(2) > /dev/null) +endef + +$(objcse)/cse_%.bin: $(CSE_SERGER) cse_inputs $(cse_decomp_files) + printf " CREATE $(@F) (version $(CSE_BPDT_VERSION))\n" + $(CSE_SERGER) $@ create-bpdt -v $(CSE_BPDT_VERSION) > /dev/null + $(foreach ingredient,$(cse_$*_ingredients),\ + $(call cse_add_ingredient,$(@F),$(ingredient));) + +$(OBJ_ME_BIN): $(CSE_BP1_BIN) $(CSE_BP2_BIN) $(CSE_DATA_INPUT) $(obj)/fmap_config.h + printf " CREATE $(@F)\n" + $(CSE_SERGER) $@ create-cse-region -v $(CSE_BPDT_VERSION) \ + --bp1 $(CSE_BP1_OFFSET):$(CSE_BP1_SIZE) --bp1_file $(CSE_BP1_BIN) \ + --bp2 $(CSE_BP2_OFFSET):$(CSE_BP2_SIZE) --bp2_file $(CSE_BP2_BIN) \ + --dp $(CSE_DP_OFFSET):$(CSE_DP_SIZE) --dp_file $(CSE_DATA_INPUT) > /dev/null + +endif + +ifeq ($(CONFIG_SOC_INTEL_CSE_RW_UPDATE),y) + +ifeq ($(CONFIG_SOC_INTEL_CSE_RW_VERSION),"") +$(error "CSE RW version is missing and need to be set by mainboard config") +endif + +ifneq ($(CONFIG_STITCH_ME_BIN),y) + +ifeq ($(CONFIG_SOC_INTEL_CSE_RW_FILE),"") +$(error "CSE RW file path is missing and need to be set by mainboard config") +endif +CSE_RW_FILE := $(call strip_quotes,$(CONFIG_SOC_INTEL_CSE_RW_FILE)) + +endif + +CSE_LITE_ME_RW = $(call strip_quotes,$(CONFIG_SOC_INTEL_CSE_RW_CBFS_NAME)) + +regions-for-file-$(CSE_LITE_ME_RW) = FW_MAIN_A,FW_MAIN_B + +cbfs-files-y += $(CSE_LITE_ME_RW) +$(CSE_LITE_ME_RW)-file := $(CSE_RW_FILE) +$(CSE_LITE_ME_RW)-name := $(CSE_LITE_ME_RW) +$(CSE_LITE_ME_RW)-type := raw +ifeq ($(CONFIG_SOC_INTEL_CSE_LITE_COMPRESS_ME_RW),y) +$(CSE_LITE_ME_RW)-compression := LZMA +endif + +$(obj)/cse_rw.version: + @echo '$(call strip_quotes,$(CONFIG_SOC_INTEL_CSE_RW_VERSION))' > $@ + +CSE_RW_VERSION = $(call strip_quotes,$(CONFIG_SOC_INTEL_CSE_RW_VERSION_CBFS_NAME)) +regions-for-file-$(CSE_RW_VERSION) = FW_MAIN_A,FW_MAIN_B +cbfs-files-y += $(CSE_RW_VERSION) +$(CSE_RW_VERSION)-file := $(obj)/cse_rw.version +$(CSE_RW_VERSION)-name := $(CSE_RW_VERSION) +$(CSE_RW_VERSION)-type := raw + +endif + +ifeq ($(CONFIG_SOC_INTEL_CSE_SUB_PART_UPDATE),y) + +CSE_IOM_FILE = $(call strip_quotes,$(CONFIG_SOC_INTEL_CSE_IOM_CBFS_FILE)) +CSE_IOM = $(call strip_quotes,$(CONFIG_SOC_INTEL_CSE_IOM_CBFS_NAME)) +regions-for-file-$(CSE_IOM) = FW_MAIN_A,FW_MAIN_B,COREBOOT +cbfs-files-y += $(CSE_IOM) +$(CSE_IOM)-file := $(CSE_IOM_FILE) +$(CSE_IOM)-name := $(CSE_IOM) +$(CSE_IOM)-type := raw + +CSE_NPHY_FILE = $(call strip_quotes,$(CONFIG_SOC_INTEL_CSE_NPHY_CBFS_FILE)) +CSE_NPHY = $(call strip_quotes,$(CONFIG_SOC_INTEL_CSE_NPHY_CBFS_NAME)) +regions-for-file-$(CSE_NPHY) = FW_MAIN_A,FW_MAIN_B,COREBOOT +cbfs-files-y += $(CSE_NPHY) +$(CSE_NPHY)-file := $(CSE_NPHY_FILE) +$(CSE_NPHY)-name := $(CSE_NPHY) +$(CSE_NPHY)-type := raw +endif diff --git a/src/soc/intel/common/block/dsp/Makefile.inc b/src/soc/intel/common/block/dsp/Makefile.inc deleted file mode 100644 index 99efaa87bb..0000000000 --- a/src/soc/intel/common/block/dsp/Makefile.inc +++ /dev/null @@ -1,2 +0,0 @@ -## SPDX-License-Identifier: GPL-2.0-only -ramstage-$(CONFIG_SOC_INTEL_COMMON_BLOCK_DSP) += dsp.c diff --git a/src/soc/intel/common/block/dsp/Makefile.mk b/src/soc/intel/common/block/dsp/Makefile.mk new file mode 100644 index 0000000000..99efaa87bb --- /dev/null +++ b/src/soc/intel/common/block/dsp/Makefile.mk @@ -0,0 +1,2 @@ +## SPDX-License-Identifier: GPL-2.0-only +ramstage-$(CONFIG_SOC_INTEL_COMMON_BLOCK_DSP) += dsp.c diff --git a/src/soc/intel/common/block/dtt/Makefile.inc b/src/soc/intel/common/block/dtt/Makefile.inc deleted file mode 100644 index f1d058407e..0000000000 --- a/src/soc/intel/common/block/dtt/Makefile.inc +++ /dev/null @@ -1,2 +0,0 @@ -## SPDX-License-Identifier: GPL-2.0-only -ramstage-$(CONFIG_SOC_INTEL_COMMON_BLOCK_DTT) += dtt.c diff --git a/src/soc/intel/common/block/dtt/Makefile.mk b/src/soc/intel/common/block/dtt/Makefile.mk new file mode 100644 index 0000000000..f1d058407e --- /dev/null +++ b/src/soc/intel/common/block/dtt/Makefile.mk @@ -0,0 +1,2 @@ +## SPDX-License-Identifier: GPL-2.0-only +ramstage-$(CONFIG_SOC_INTEL_COMMON_BLOCK_DTT) += dtt.c diff --git a/src/soc/intel/common/block/fast_spi/Makefile.inc b/src/soc/intel/common/block/fast_spi/Makefile.inc deleted file mode 100644 index ddf15748ae..0000000000 --- a/src/soc/intel/common/block/fast_spi/Makefile.inc +++ /dev/null @@ -1,104 +0,0 @@ -## SPDX-License-Identifier: GPL-2.0-only -bootblock-$(CONFIG_SOC_INTEL_COMMON_BLOCK_FAST_SPI) += fast_spi.c -bootblock-$(CONFIG_SOC_INTEL_COMMON_BLOCK_FAST_SPI) += fast_spi_flash.c - -verstage-$(CONFIG_SOC_INTEL_COMMON_BLOCK_FAST_SPI) += fast_spi.c -verstage-$(CONFIG_SOC_INTEL_COMMON_BLOCK_FAST_SPI) += fast_spi_flash.c - -romstage-$(CONFIG_SOC_INTEL_COMMON_BLOCK_FAST_SPI) += fast_spi.c -romstage-$(CONFIG_SOC_INTEL_COMMON_BLOCK_FAST_SPI) += fast_spi_flash.c - -ramstage-$(CONFIG_SOC_INTEL_COMMON_BLOCK_FAST_SPI) += fast_spi.c -ramstage-$(CONFIG_SOC_INTEL_COMMON_BLOCK_FAST_SPI) += fast_spi_flash.c - -postcar-$(CONFIG_SOC_INTEL_COMMON_BLOCK_FAST_SPI) += fast_spi.c -postcar-$(CONFIG_SOC_INTEL_COMMON_BLOCK_FAST_SPI) += fast_spi_flash.c - -smm-$(CONFIG_SOC_INTEL_COMMON_BLOCK_FAST_SPI) += fast_spi.c -ifeq ($(CONFIG_SPI_FLASH_SMM),y) -smm-$(CONFIG_SOC_INTEL_COMMON_BLOCK_FAST_SPI) += fast_spi_flash.c -endif - -CPPFLAGS_common += -I$(src)/soc/intel/common/block/fast_spi - -ifeq ($(CONFIG_FAST_SPI_SUPPORTS_EXT_BIOS_WINDOW),y) - -# mmap_boot.c provides a custom boot media device for the platforms that support -# additional window for BIOS regions greater than 16MiB. This is used instead of -# the default boot media device in arch/x86/mmap_boot.c -bootblock-y += mmap_boot.c -verstage-y += mmap_boot.c -romstage-y += mmap_boot.c -postcar-y += mmap_boot.c -ramstage-y += mmap_boot.c -smm-y += mmap_boot.c - -# When using extended BIOS window, no sub-region within the BIOS region must -# cross 16MiB boundary from the end of the BIOS region. This is because the -# top 16MiB of the BIOS region are decoded by the standard window from -# (4G - 16M) to 4G. There is no standard section name that identifies the BIOS -# region in flashmap. This check assumes that BIOS region is placed at the top -# of SPI flash and hence calculates the boundary as flash_size - 16M. If any -# region within the SPI flash crosses this boundary, then the check complains -# and exits. - -$(call add_intermediate, check-fmap-16mib-crossing, $(obj)/fmap_config.h) - fmap_get() { awk "/$$1/ { print \$$NF }" < $<; }; \ - \ - flash_offset=$$(fmap_get FMAP_SECTION_FLASH_START); \ - flash_size=$$(fmap_get FMAP_SECTION_FLASH_SIZE); \ - if [ $$((flash_size)) -le $$((0x1000000)) ]; then \ - exit; \ - fi; \ - bios_16M_boundary=$$((flash_size-0x1000000)); \ - for x in $$(grep "FMAP_TERMINAL_SECTIONS" < $< | cut -d\" -f2); \ - do \ - start=$$(fmap_get "FMAP_SECTION_$${x}_START"); \ - size=$$(fmap_get "FMAP_SECTION_$${x}_SIZE"); \ - start=$$((start-flash_offset)); \ - end=$$((start+size-1)); \ - if [ $$((start)) -lt $$((bios_16M_boundary)) ] && \ - [ $$((end)) -ge $$((bios_16M_boundary)) ]; \ - then \ - echo "ERROR: $$x crosses 16MiB boundary"; \ - fail=1; \ - break; \ - fi; \ - done; \ - exit $$fail - -# If the platform supports extended window and the SPI flash size is greater -# than 16MiB, then create a mapping for the extended window as well. -# The assumptions here are: -# 1. Top 16MiB is still decoded in the fixed decode window just below 4G -# boundary. -# 2. Rest of the SPI flash below the top 16MiB is mapped at the top of extended -# window. Even though the platform might support a larger extended window, the -# SPI flash part used by the mainboard might not be large enough to be mapped -# in the entire window. In such cases, the mapping is assumed to be in the top -# part of the extended window with the bottom part remaining unused. -# -# Example: -# ext_win_base = 0xF8000000 -# ext_win_size = 32 # MiB -# ext_win_limit = ext_win_base + ext_win_size - 1 = 0xF9FFFFFF -# -# If SPI flash is 32MiB, then top 16MiB is mapped from 0xFF000000 - 0xFFFFFFFF -# whereas the bottom 16MiB is mapped from 0xF9000000 - 0xF9FFFFFF. The extended -# window 0xF8000000 - 0xF8FFFFFF remains unused. -# - -ifeq ($(call int-gt, $(CONFIG_ROM_SIZE) 0x1000000), 1) -DEFAULT_WINDOW_SIZE=0x1000000 -DEFAULT_WINDOW_FLASH_BASE=$(call int-subtract, $(CONFIG_ROM_SIZE) $(DEFAULT_WINDOW_SIZE)) -DEFAULT_WINDOW_MMIO_BASE=0xff000000 -EXT_WINDOW_FLASH_BASE=0 -EXT_WINDOW_SIZE=$(DEFAULT_WINDOW_FLASH_BASE) -EXT_WINDOW_MMIO_BASE=$(call int-subtract, $(call int-add, $(CONFIG_EXT_BIOS_WIN_BASE) $(CONFIG_EXT_BIOS_WIN_SIZE)) \ - $(EXT_WINDOW_SIZE)) -CBFSTOOL_ADD_CMD_OPTIONS += --mmap $(DEFAULT_WINDOW_FLASH_BASE):$(DEFAULT_WINDOW_MMIO_BASE):$(DEFAULT_WINDOW_SIZE) -CBFSTOOL_ADD_CMD_OPTIONS += --mmap $(EXT_WINDOW_FLASH_BASE):$(EXT_WINDOW_MMIO_BASE):$(EXT_WINDOW_SIZE) -endif - - -endif # CONFIG_FAST_SPI_SUPPORTS_EXT_BIOS_WINDOW diff --git a/src/soc/intel/common/block/fast_spi/Makefile.mk b/src/soc/intel/common/block/fast_spi/Makefile.mk new file mode 100644 index 0000000000..ddf15748ae --- /dev/null +++ b/src/soc/intel/common/block/fast_spi/Makefile.mk @@ -0,0 +1,104 @@ +## SPDX-License-Identifier: GPL-2.0-only +bootblock-$(CONFIG_SOC_INTEL_COMMON_BLOCK_FAST_SPI) += fast_spi.c +bootblock-$(CONFIG_SOC_INTEL_COMMON_BLOCK_FAST_SPI) += fast_spi_flash.c + +verstage-$(CONFIG_SOC_INTEL_COMMON_BLOCK_FAST_SPI) += fast_spi.c +verstage-$(CONFIG_SOC_INTEL_COMMON_BLOCK_FAST_SPI) += fast_spi_flash.c + +romstage-$(CONFIG_SOC_INTEL_COMMON_BLOCK_FAST_SPI) += fast_spi.c +romstage-$(CONFIG_SOC_INTEL_COMMON_BLOCK_FAST_SPI) += fast_spi_flash.c + +ramstage-$(CONFIG_SOC_INTEL_COMMON_BLOCK_FAST_SPI) += fast_spi.c +ramstage-$(CONFIG_SOC_INTEL_COMMON_BLOCK_FAST_SPI) += fast_spi_flash.c + +postcar-$(CONFIG_SOC_INTEL_COMMON_BLOCK_FAST_SPI) += fast_spi.c +postcar-$(CONFIG_SOC_INTEL_COMMON_BLOCK_FAST_SPI) += fast_spi_flash.c + +smm-$(CONFIG_SOC_INTEL_COMMON_BLOCK_FAST_SPI) += fast_spi.c +ifeq ($(CONFIG_SPI_FLASH_SMM),y) +smm-$(CONFIG_SOC_INTEL_COMMON_BLOCK_FAST_SPI) += fast_spi_flash.c +endif + +CPPFLAGS_common += -I$(src)/soc/intel/common/block/fast_spi + +ifeq ($(CONFIG_FAST_SPI_SUPPORTS_EXT_BIOS_WINDOW),y) + +# mmap_boot.c provides a custom boot media device for the platforms that support +# additional window for BIOS regions greater than 16MiB. This is used instead of +# the default boot media device in arch/x86/mmap_boot.c +bootblock-y += mmap_boot.c +verstage-y += mmap_boot.c +romstage-y += mmap_boot.c +postcar-y += mmap_boot.c +ramstage-y += mmap_boot.c +smm-y += mmap_boot.c + +# When using extended BIOS window, no sub-region within the BIOS region must +# cross 16MiB boundary from the end of the BIOS region. This is because the +# top 16MiB of the BIOS region are decoded by the standard window from +# (4G - 16M) to 4G. There is no standard section name that identifies the BIOS +# region in flashmap. This check assumes that BIOS region is placed at the top +# of SPI flash and hence calculates the boundary as flash_size - 16M. If any +# region within the SPI flash crosses this boundary, then the check complains +# and exits. + +$(call add_intermediate, check-fmap-16mib-crossing, $(obj)/fmap_config.h) + fmap_get() { awk "/$$1/ { print \$$NF }" < $<; }; \ + \ + flash_offset=$$(fmap_get FMAP_SECTION_FLASH_START); \ + flash_size=$$(fmap_get FMAP_SECTION_FLASH_SIZE); \ + if [ $$((flash_size)) -le $$((0x1000000)) ]; then \ + exit; \ + fi; \ + bios_16M_boundary=$$((flash_size-0x1000000)); \ + for x in $$(grep "FMAP_TERMINAL_SECTIONS" < $< | cut -d\" -f2); \ + do \ + start=$$(fmap_get "FMAP_SECTION_$${x}_START"); \ + size=$$(fmap_get "FMAP_SECTION_$${x}_SIZE"); \ + start=$$((start-flash_offset)); \ + end=$$((start+size-1)); \ + if [ $$((start)) -lt $$((bios_16M_boundary)) ] && \ + [ $$((end)) -ge $$((bios_16M_boundary)) ]; \ + then \ + echo "ERROR: $$x crosses 16MiB boundary"; \ + fail=1; \ + break; \ + fi; \ + done; \ + exit $$fail + +# If the platform supports extended window and the SPI flash size is greater +# than 16MiB, then create a mapping for the extended window as well. +# The assumptions here are: +# 1. Top 16MiB is still decoded in the fixed decode window just below 4G +# boundary. +# 2. Rest of the SPI flash below the top 16MiB is mapped at the top of extended +# window. Even though the platform might support a larger extended window, the +# SPI flash part used by the mainboard might not be large enough to be mapped +# in the entire window. In such cases, the mapping is assumed to be in the top +# part of the extended window with the bottom part remaining unused. +# +# Example: +# ext_win_base = 0xF8000000 +# ext_win_size = 32 # MiB +# ext_win_limit = ext_win_base + ext_win_size - 1 = 0xF9FFFFFF +# +# If SPI flash is 32MiB, then top 16MiB is mapped from 0xFF000000 - 0xFFFFFFFF +# whereas the bottom 16MiB is mapped from 0xF9000000 - 0xF9FFFFFF. The extended +# window 0xF8000000 - 0xF8FFFFFF remains unused. +# + +ifeq ($(call int-gt, $(CONFIG_ROM_SIZE) 0x1000000), 1) +DEFAULT_WINDOW_SIZE=0x1000000 +DEFAULT_WINDOW_FLASH_BASE=$(call int-subtract, $(CONFIG_ROM_SIZE) $(DEFAULT_WINDOW_SIZE)) +DEFAULT_WINDOW_MMIO_BASE=0xff000000 +EXT_WINDOW_FLASH_BASE=0 +EXT_WINDOW_SIZE=$(DEFAULT_WINDOW_FLASH_BASE) +EXT_WINDOW_MMIO_BASE=$(call int-subtract, $(call int-add, $(CONFIG_EXT_BIOS_WIN_BASE) $(CONFIG_EXT_BIOS_WIN_SIZE)) \ + $(EXT_WINDOW_SIZE)) +CBFSTOOL_ADD_CMD_OPTIONS += --mmap $(DEFAULT_WINDOW_FLASH_BASE):$(DEFAULT_WINDOW_MMIO_BASE):$(DEFAULT_WINDOW_SIZE) +CBFSTOOL_ADD_CMD_OPTIONS += --mmap $(EXT_WINDOW_FLASH_BASE):$(EXT_WINDOW_MMIO_BASE):$(EXT_WINDOW_SIZE) +endif + + +endif # CONFIG_FAST_SPI_SUPPORTS_EXT_BIOS_WINDOW diff --git a/src/soc/intel/common/block/gpio/Makefile.inc b/src/soc/intel/common/block/gpio/Makefile.inc deleted file mode 100644 index 62f46b78e4..0000000000 --- a/src/soc/intel/common/block/gpio/Makefile.inc +++ /dev/null @@ -1,8 +0,0 @@ -## SPDX-License-Identifier: GPL-2.0-only -bootblock-$(CONFIG_SOC_INTEL_COMMON_BLOCK_GPIO) += gpio.c -ramstage-$(CONFIG_SOC_INTEL_COMMON_BLOCK_GPIO) += gpio.c -romstage-$(CONFIG_SOC_INTEL_COMMON_BLOCK_GPIO) += gpio.c -smm-$(CONFIG_SOC_INTEL_COMMON_BLOCK_GPIO) += gpio.c -verstage-$(CONFIG_SOC_INTEL_COMMON_BLOCK_GPIO) += gpio.c - -ramstage-$(CONFIG_SOC_INTEL_COMMON_BLOCK_GPIO) += gpio_dev.c diff --git a/src/soc/intel/common/block/gpio/Makefile.mk b/src/soc/intel/common/block/gpio/Makefile.mk new file mode 100644 index 0000000000..62f46b78e4 --- /dev/null +++ b/src/soc/intel/common/block/gpio/Makefile.mk @@ -0,0 +1,8 @@ +## SPDX-License-Identifier: GPL-2.0-only +bootblock-$(CONFIG_SOC_INTEL_COMMON_BLOCK_GPIO) += gpio.c +ramstage-$(CONFIG_SOC_INTEL_COMMON_BLOCK_GPIO) += gpio.c +romstage-$(CONFIG_SOC_INTEL_COMMON_BLOCK_GPIO) += gpio.c +smm-$(CONFIG_SOC_INTEL_COMMON_BLOCK_GPIO) += gpio.c +verstage-$(CONFIG_SOC_INTEL_COMMON_BLOCK_GPIO) += gpio.c + +ramstage-$(CONFIG_SOC_INTEL_COMMON_BLOCK_GPIO) += gpio_dev.c diff --git a/src/soc/intel/common/block/gpmr/Makefile.inc b/src/soc/intel/common/block/gpmr/Makefile.inc deleted file mode 100644 index bfaec52c76..0000000000 --- a/src/soc/intel/common/block/gpmr/Makefile.inc +++ /dev/null @@ -1,8 +0,0 @@ -## SPDX-License-Identifier: GPL-2.0-only -ifeq ($(CONFIG_SOC_INTEL_COMMON_BLOCK_GPMR), y) - -bootblock-y += gpmr.c -romstage-y += gpmr.c -ramstage-y += gpmr.c - -endif diff --git a/src/soc/intel/common/block/gpmr/Makefile.mk b/src/soc/intel/common/block/gpmr/Makefile.mk new file mode 100644 index 0000000000..bfaec52c76 --- /dev/null +++ b/src/soc/intel/common/block/gpmr/Makefile.mk @@ -0,0 +1,8 @@ +## SPDX-License-Identifier: GPL-2.0-only +ifeq ($(CONFIG_SOC_INTEL_COMMON_BLOCK_GPMR), y) + +bootblock-y += gpmr.c +romstage-y += gpmr.c +ramstage-y += gpmr.c + +endif diff --git a/src/soc/intel/common/block/graphics/Makefile.inc b/src/soc/intel/common/block/graphics/Makefile.inc deleted file mode 100644 index ac053de838..0000000000 --- a/src/soc/intel/common/block/graphics/Makefile.inc +++ /dev/null @@ -1,3 +0,0 @@ -## SPDX-License-Identifier: GPL-2.0-only -romstage-$(CONFIG_SOC_INTEL_COMMON_BLOCK_GRAPHICS) += early_graphics.c -ramstage-$(CONFIG_SOC_INTEL_COMMON_BLOCK_GRAPHICS) += graphics.c diff --git a/src/soc/intel/common/block/graphics/Makefile.mk b/src/soc/intel/common/block/graphics/Makefile.mk new file mode 100644 index 0000000000..ac053de838 --- /dev/null +++ b/src/soc/intel/common/block/graphics/Makefile.mk @@ -0,0 +1,3 @@ +## SPDX-License-Identifier: GPL-2.0-only +romstage-$(CONFIG_SOC_INTEL_COMMON_BLOCK_GRAPHICS) += early_graphics.c +ramstage-$(CONFIG_SOC_INTEL_COMMON_BLOCK_GRAPHICS) += graphics.c diff --git a/src/soc/intel/common/block/gspi/Makefile.inc b/src/soc/intel/common/block/gspi/Makefile.inc deleted file mode 100644 index a820866ceb..0000000000 --- a/src/soc/intel/common/block/gspi/Makefile.inc +++ /dev/null @@ -1,6 +0,0 @@ -## SPDX-License-Identifier: GPL-2.0-only -bootblock-$(CONFIG_SOC_INTEL_COMMON_BLOCK_GSPI) += gspi.c -romstage-$(CONFIG_SOC_INTEL_COMMON_BLOCK_GSPI) += gspi.c -ramstage-$(CONFIG_SOC_INTEL_COMMON_BLOCK_GSPI) += gspi.c -verstage-$(CONFIG_SOC_INTEL_COMMON_BLOCK_GSPI) += gspi.c -postcar-$(CONFIG_SOC_INTEL_COMMON_BLOCK_GSPI) += gspi.c diff --git a/src/soc/intel/common/block/gspi/Makefile.mk b/src/soc/intel/common/block/gspi/Makefile.mk new file mode 100644 index 0000000000..a820866ceb --- /dev/null +++ b/src/soc/intel/common/block/gspi/Makefile.mk @@ -0,0 +1,6 @@ +## SPDX-License-Identifier: GPL-2.0-only +bootblock-$(CONFIG_SOC_INTEL_COMMON_BLOCK_GSPI) += gspi.c +romstage-$(CONFIG_SOC_INTEL_COMMON_BLOCK_GSPI) += gspi.c +ramstage-$(CONFIG_SOC_INTEL_COMMON_BLOCK_GSPI) += gspi.c +verstage-$(CONFIG_SOC_INTEL_COMMON_BLOCK_GSPI) += gspi.c +postcar-$(CONFIG_SOC_INTEL_COMMON_BLOCK_GSPI) += gspi.c diff --git a/src/soc/intel/common/block/hda/Makefile.inc b/src/soc/intel/common/block/hda/Makefile.inc deleted file mode 100644 index b7d9dea53c..0000000000 --- a/src/soc/intel/common/block/hda/Makefile.inc +++ /dev/null @@ -1,2 +0,0 @@ -## SPDX-License-Identifier: GPL-2.0-only -ramstage-$(CONFIG_SOC_INTEL_COMMON_BLOCK_HDA) += hda.c diff --git a/src/soc/intel/common/block/hda/Makefile.mk b/src/soc/intel/common/block/hda/Makefile.mk new file mode 100644 index 0000000000..b7d9dea53c --- /dev/null +++ b/src/soc/intel/common/block/hda/Makefile.mk @@ -0,0 +1,2 @@ +## SPDX-License-Identifier: GPL-2.0-only +ramstage-$(CONFIG_SOC_INTEL_COMMON_BLOCK_HDA) += hda.c diff --git a/src/soc/intel/common/block/i2c/Makefile.inc b/src/soc/intel/common/block/i2c/Makefile.inc deleted file mode 100644 index 0a03fac4ce..0000000000 --- a/src/soc/intel/common/block/i2c/Makefile.inc +++ /dev/null @@ -1,10 +0,0 @@ -## SPDX-License-Identifier: GPL-2.0-only -ifeq ($(CONFIG_SOC_INTEL_COMMON_BLOCK_I2C),y) - -bootblock-y += i2c.c -romstage-y += i2c.c -verstage-y += i2c.c -postcar-y += i2c.c -ramstage-y += i2c.c - -endif diff --git a/src/soc/intel/common/block/i2c/Makefile.mk b/src/soc/intel/common/block/i2c/Makefile.mk new file mode 100644 index 0000000000..0a03fac4ce --- /dev/null +++ b/src/soc/intel/common/block/i2c/Makefile.mk @@ -0,0 +1,10 @@ +## SPDX-License-Identifier: GPL-2.0-only +ifeq ($(CONFIG_SOC_INTEL_COMMON_BLOCK_I2C),y) + +bootblock-y += i2c.c +romstage-y += i2c.c +verstage-y += i2c.c +postcar-y += i2c.c +ramstage-y += i2c.c + +endif diff --git a/src/soc/intel/common/block/ioc/Makefile.inc b/src/soc/intel/common/block/ioc/Makefile.inc deleted file mode 100644 index 19ad8d0476..0000000000 --- a/src/soc/intel/common/block/ioc/Makefile.inc +++ /dev/null @@ -1,4 +0,0 @@ -## SPDX-License-Identifier: GPL-2.0-only -bootblock-$(CONFIG_SOC_INTEL_COMMON_BLOCK_IOC) += ioc.c -romstage-$(CONFIG_SOC_INTEL_COMMON_BLOCK_IOC) += ioc.c -ramstage-$(CONFIG_SOC_INTEL_COMMON_BLOCK_IOC) += ioc.c diff --git a/src/soc/intel/common/block/ioc/Makefile.mk b/src/soc/intel/common/block/ioc/Makefile.mk new file mode 100644 index 0000000000..19ad8d0476 --- /dev/null +++ b/src/soc/intel/common/block/ioc/Makefile.mk @@ -0,0 +1,4 @@ +## SPDX-License-Identifier: GPL-2.0-only +bootblock-$(CONFIG_SOC_INTEL_COMMON_BLOCK_IOC) += ioc.c +romstage-$(CONFIG_SOC_INTEL_COMMON_BLOCK_IOC) += ioc.c +ramstage-$(CONFIG_SOC_INTEL_COMMON_BLOCK_IOC) += ioc.c diff --git a/src/soc/intel/common/block/ipu/Makefile.inc b/src/soc/intel/common/block/ipu/Makefile.inc deleted file mode 100644 index 9aa7668703..0000000000 --- a/src/soc/intel/common/block/ipu/Makefile.inc +++ /dev/null @@ -1,2 +0,0 @@ -## SPDX-License-Identifier: GPL-2.0-only -ramstage-$(CONFIG_SOC_INTEL_COMMON_BLOCK_IPU) += ipu.c diff --git a/src/soc/intel/common/block/ipu/Makefile.mk b/src/soc/intel/common/block/ipu/Makefile.mk new file mode 100644 index 0000000000..9aa7668703 --- /dev/null +++ b/src/soc/intel/common/block/ipu/Makefile.mk @@ -0,0 +1,2 @@ +## SPDX-License-Identifier: GPL-2.0-only +ramstage-$(CONFIG_SOC_INTEL_COMMON_BLOCK_IPU) += ipu.c diff --git a/src/soc/intel/common/block/irq/Makefile.inc b/src/soc/intel/common/block/irq/Makefile.inc deleted file mode 100644 index ce801bd443..0000000000 --- a/src/soc/intel/common/block/irq/Makefile.inc +++ /dev/null @@ -1,2 +0,0 @@ -## SPDX-License-Identifier: GPL-2.0-only -ramstage-$(CONFIG_SOC_INTEL_COMMON_BLOCK_IRQ) += irq.c diff --git a/src/soc/intel/common/block/irq/Makefile.mk b/src/soc/intel/common/block/irq/Makefile.mk new file mode 100644 index 0000000000..ce801bd443 --- /dev/null +++ b/src/soc/intel/common/block/irq/Makefile.mk @@ -0,0 +1,2 @@ +## SPDX-License-Identifier: GPL-2.0-only +ramstage-$(CONFIG_SOC_INTEL_COMMON_BLOCK_IRQ) += irq.c diff --git a/src/soc/intel/common/block/itss/Makefile.inc b/src/soc/intel/common/block/itss/Makefile.inc deleted file mode 100644 index 543bfa3f28..0000000000 --- a/src/soc/intel/common/block/itss/Makefile.inc +++ /dev/null @@ -1,4 +0,0 @@ -## SPDX-License-Identifier: GPL-2.0-only -bootblock-$(CONFIG_SOC_INTEL_COMMON_BLOCK_ITSS) += itss.c -romstage-$(CONFIG_SOC_INTEL_COMMON_BLOCK_ITSS) += itss.c -ramstage-$(CONFIG_SOC_INTEL_COMMON_BLOCK_ITSS) += itss.c diff --git a/src/soc/intel/common/block/itss/Makefile.mk b/src/soc/intel/common/block/itss/Makefile.mk new file mode 100644 index 0000000000..543bfa3f28 --- /dev/null +++ b/src/soc/intel/common/block/itss/Makefile.mk @@ -0,0 +1,4 @@ +## SPDX-License-Identifier: GPL-2.0-only +bootblock-$(CONFIG_SOC_INTEL_COMMON_BLOCK_ITSS) += itss.c +romstage-$(CONFIG_SOC_INTEL_COMMON_BLOCK_ITSS) += itss.c +ramstage-$(CONFIG_SOC_INTEL_COMMON_BLOCK_ITSS) += itss.c diff --git a/src/soc/intel/common/block/lpc/Makefile.inc b/src/soc/intel/common/block/lpc/Makefile.inc deleted file mode 100644 index b510cd0ec3..0000000000 --- a/src/soc/intel/common/block/lpc/Makefile.inc +++ /dev/null @@ -1,7 +0,0 @@ -## SPDX-License-Identifier: GPL-2.0-only -bootblock-$(CONFIG_SOC_INTEL_COMMON_BLOCK_LPC) += lpc_lib.c - -romstage-$(CONFIG_SOC_INTEL_COMMON_BLOCK_LPC) += lpc_lib.c - -ramstage-$(CONFIG_SOC_INTEL_COMMON_BLOCK_LPC) += lpc_lib.c -ramstage-$(CONFIG_SOC_INTEL_COMMON_BLOCK_LPC) += lpc.c diff --git a/src/soc/intel/common/block/lpc/Makefile.mk b/src/soc/intel/common/block/lpc/Makefile.mk new file mode 100644 index 0000000000..b510cd0ec3 --- /dev/null +++ b/src/soc/intel/common/block/lpc/Makefile.mk @@ -0,0 +1,7 @@ +## SPDX-License-Identifier: GPL-2.0-only +bootblock-$(CONFIG_SOC_INTEL_COMMON_BLOCK_LPC) += lpc_lib.c + +romstage-$(CONFIG_SOC_INTEL_COMMON_BLOCK_LPC) += lpc_lib.c + +ramstage-$(CONFIG_SOC_INTEL_COMMON_BLOCK_LPC) += lpc_lib.c +ramstage-$(CONFIG_SOC_INTEL_COMMON_BLOCK_LPC) += lpc.c diff --git a/src/soc/intel/common/block/lpss/Makefile.inc b/src/soc/intel/common/block/lpss/Makefile.inc deleted file mode 100644 index c990ffaa3e..0000000000 --- a/src/soc/intel/common/block/lpss/Makefile.inc +++ /dev/null @@ -1,7 +0,0 @@ -## SPDX-License-Identifier: GPL-2.0-only -bootblock-$(CONFIG_SOC_INTEL_COMMON_BLOCK_LPSS) += lpss.c -romstage-$(CONFIG_SOC_INTEL_COMMON_BLOCK_LPSS) += lpss.c -verstage-$(CONFIG_SOC_INTEL_COMMON_BLOCK_LPSS) += lpss.c -ramstage-$(CONFIG_SOC_INTEL_COMMON_BLOCK_LPSS) += lpss.c -postcar-$(CONFIG_SOC_INTEL_COMMON_BLOCK_LPSS) += lpss.c -smm-$(CONFIG_SOC_INTEL_COMMON_BLOCK_LPSS) += lpss.c diff --git a/src/soc/intel/common/block/lpss/Makefile.mk b/src/soc/intel/common/block/lpss/Makefile.mk new file mode 100644 index 0000000000..c990ffaa3e --- /dev/null +++ b/src/soc/intel/common/block/lpss/Makefile.mk @@ -0,0 +1,7 @@ +## SPDX-License-Identifier: GPL-2.0-only +bootblock-$(CONFIG_SOC_INTEL_COMMON_BLOCK_LPSS) += lpss.c +romstage-$(CONFIG_SOC_INTEL_COMMON_BLOCK_LPSS) += lpss.c +verstage-$(CONFIG_SOC_INTEL_COMMON_BLOCK_LPSS) += lpss.c +ramstage-$(CONFIG_SOC_INTEL_COMMON_BLOCK_LPSS) += lpss.c +postcar-$(CONFIG_SOC_INTEL_COMMON_BLOCK_LPSS) += lpss.c +smm-$(CONFIG_SOC_INTEL_COMMON_BLOCK_LPSS) += lpss.c diff --git a/src/soc/intel/common/block/memory/Makefile.inc b/src/soc/intel/common/block/memory/Makefile.inc deleted file mode 100644 index 083864fc64..0000000000 --- a/src/soc/intel/common/block/memory/Makefile.inc +++ /dev/null @@ -1,2 +0,0 @@ -## SPDX-License-Identifier: GPL-2.0-only -romstage-$(CONFIG_SOC_INTEL_COMMON_BLOCK_MEMINIT) += meminit.c diff --git a/src/soc/intel/common/block/memory/Makefile.mk b/src/soc/intel/common/block/memory/Makefile.mk new file mode 100644 index 0000000000..083864fc64 --- /dev/null +++ b/src/soc/intel/common/block/memory/Makefile.mk @@ -0,0 +1,2 @@ +## SPDX-License-Identifier: GPL-2.0-only +romstage-$(CONFIG_SOC_INTEL_COMMON_BLOCK_MEMINIT) += meminit.c diff --git a/src/soc/intel/common/block/oc_wdt/Makefile.inc b/src/soc/intel/common/block/oc_wdt/Makefile.inc deleted file mode 100644 index 8f7282a004..0000000000 --- a/src/soc/intel/common/block/oc_wdt/Makefile.inc +++ /dev/null @@ -1,4 +0,0 @@ -## SPDX-License-Identifier: GPL-2.0-only - -all-$(CONFIG_SOC_INTEL_COMMON_BLOCK_OC_WDT) += oc_wdt.c -smm-$(CONFIG_SOC_INTEL_COMMON_BLOCK_OC_WDT) += oc_wdt.c diff --git a/src/soc/intel/common/block/oc_wdt/Makefile.mk b/src/soc/intel/common/block/oc_wdt/Makefile.mk new file mode 100644 index 0000000000..8f7282a004 --- /dev/null +++ b/src/soc/intel/common/block/oc_wdt/Makefile.mk @@ -0,0 +1,4 @@ +## SPDX-License-Identifier: GPL-2.0-only + +all-$(CONFIG_SOC_INTEL_COMMON_BLOCK_OC_WDT) += oc_wdt.c +smm-$(CONFIG_SOC_INTEL_COMMON_BLOCK_OC_WDT) += oc_wdt.c diff --git a/src/soc/intel/common/block/p2sb/Makefile.inc b/src/soc/intel/common/block/p2sb/Makefile.inc deleted file mode 100644 index bcdd5a2752..0000000000 --- a/src/soc/intel/common/block/p2sb/Makefile.inc +++ /dev/null @@ -1,17 +0,0 @@ -## SPDX-License-Identifier: GPL-2.0-only -bootblock-$(CONFIG_SOC_INTEL_COMMON_BLOCK_BASE_P2SB) += p2sblib.c -romstage-$(CONFIG_SOC_INTEL_COMMON_BLOCK_BASE_P2SB) += p2sblib.c -ramstage-$(CONFIG_SOC_INTEL_COMMON_BLOCK_BASE_P2SB) += p2sblib.c -smm-$(CONFIG_SOC_INTEL_COMMON_BLOCK_BASE_P2SB) += p2sblib.c - -# p2sb.c for PCH and SoC die P2SB IP -bootblock-$(CONFIG_SOC_INTEL_COMMON_BLOCK_P2SB) += p2sb.c -romstage-$(CONFIG_SOC_INTEL_COMMON_BLOCK_P2SB) += p2sb.c -ramstage-$(CONFIG_SOC_INTEL_COMMON_BLOCK_P2SB) += p2sb.c -smm-$(CONFIG_SOC_INTEL_COMMON_BLOCK_P2SB) += p2sb.c - -# ioe_p2sb.c for IOE die P2SB IP -bootblock-$(CONFIG_SOC_INTEL_COMMON_BLOCK_IOE_P2SB) += ioe_p2sb.c -romstage-$(CONFIG_SOC_INTEL_COMMON_BLOCK_IOE_P2SB) += ioe_p2sb.c -ramstage-$(CONFIG_SOC_INTEL_COMMON_BLOCK_IOE_P2SB) += ioe_p2sb.c -smm-$(CONFIG_SOC_INTEL_COMMON_BLOCK_IOE_P2SB) += ioe_p2sb.c diff --git a/src/soc/intel/common/block/p2sb/Makefile.mk b/src/soc/intel/common/block/p2sb/Makefile.mk new file mode 100644 index 0000000000..bcdd5a2752 --- /dev/null +++ b/src/soc/intel/common/block/p2sb/Makefile.mk @@ -0,0 +1,17 @@ +## SPDX-License-Identifier: GPL-2.0-only +bootblock-$(CONFIG_SOC_INTEL_COMMON_BLOCK_BASE_P2SB) += p2sblib.c +romstage-$(CONFIG_SOC_INTEL_COMMON_BLOCK_BASE_P2SB) += p2sblib.c +ramstage-$(CONFIG_SOC_INTEL_COMMON_BLOCK_BASE_P2SB) += p2sblib.c +smm-$(CONFIG_SOC_INTEL_COMMON_BLOCK_BASE_P2SB) += p2sblib.c + +# p2sb.c for PCH and SoC die P2SB IP +bootblock-$(CONFIG_SOC_INTEL_COMMON_BLOCK_P2SB) += p2sb.c +romstage-$(CONFIG_SOC_INTEL_COMMON_BLOCK_P2SB) += p2sb.c +ramstage-$(CONFIG_SOC_INTEL_COMMON_BLOCK_P2SB) += p2sb.c +smm-$(CONFIG_SOC_INTEL_COMMON_BLOCK_P2SB) += p2sb.c + +# ioe_p2sb.c for IOE die P2SB IP +bootblock-$(CONFIG_SOC_INTEL_COMMON_BLOCK_IOE_P2SB) += ioe_p2sb.c +romstage-$(CONFIG_SOC_INTEL_COMMON_BLOCK_IOE_P2SB) += ioe_p2sb.c +ramstage-$(CONFIG_SOC_INTEL_COMMON_BLOCK_IOE_P2SB) += ioe_p2sb.c +smm-$(CONFIG_SOC_INTEL_COMMON_BLOCK_IOE_P2SB) += ioe_p2sb.c diff --git a/src/soc/intel/common/block/pcie/Makefile.inc b/src/soc/intel/common/block/pcie/Makefile.inc deleted file mode 100644 index 9f7ce9a6f7..0000000000 --- a/src/soc/intel/common/block/pcie/Makefile.inc +++ /dev/null @@ -1,8 +0,0 @@ -## SPDX-License-Identifier: GPL-2.0-only -subdirs-y += ./* - -romstage-$(CONFIG_SOC_INTEL_COMMON_BLOCK_PCIE) += pcie_helpers.c - -ramstage-$(CONFIG_SOC_INTEL_COMMON_BLOCK_PCIE) += pcie.c -ramstage-$(CONFIG_SOC_INTEL_COMMON_BLOCK_PCIE) += pcie_helpers.c -ramstage-$(CONFIG_SOC_INTEL_COMMON_BLOCK_PCIE) += pcie_rp.c diff --git a/src/soc/intel/common/block/pcie/Makefile.mk b/src/soc/intel/common/block/pcie/Makefile.mk new file mode 100644 index 0000000000..9f7ce9a6f7 --- /dev/null +++ b/src/soc/intel/common/block/pcie/Makefile.mk @@ -0,0 +1,8 @@ +## SPDX-License-Identifier: GPL-2.0-only +subdirs-y += ./* + +romstage-$(CONFIG_SOC_INTEL_COMMON_BLOCK_PCIE) += pcie_helpers.c + +ramstage-$(CONFIG_SOC_INTEL_COMMON_BLOCK_PCIE) += pcie.c +ramstage-$(CONFIG_SOC_INTEL_COMMON_BLOCK_PCIE) += pcie_helpers.c +ramstage-$(CONFIG_SOC_INTEL_COMMON_BLOCK_PCIE) += pcie_rp.c diff --git a/src/soc/intel/common/block/pcie/rtd3/Makefile.inc b/src/soc/intel/common/block/pcie/rtd3/Makefile.inc deleted file mode 100644 index 7e7f22c9ab..0000000000 --- a/src/soc/intel/common/block/pcie/rtd3/Makefile.inc +++ /dev/null @@ -1,2 +0,0 @@ -## SPDX-License-Identifier: GPL-2.0-only -ramstage-$(CONFIG_SOC_INTEL_COMMON_BLOCK_PCIE_RTD3) += rtd3.c diff --git a/src/soc/intel/common/block/pcie/rtd3/Makefile.mk b/src/soc/intel/common/block/pcie/rtd3/Makefile.mk new file mode 100644 index 0000000000..7e7f22c9ab --- /dev/null +++ b/src/soc/intel/common/block/pcie/rtd3/Makefile.mk @@ -0,0 +1,2 @@ +## SPDX-License-Identifier: GPL-2.0-only +ramstage-$(CONFIG_SOC_INTEL_COMMON_BLOCK_PCIE_RTD3) += rtd3.c diff --git a/src/soc/intel/common/block/pcr/Makefile.inc b/src/soc/intel/common/block/pcr/Makefile.inc deleted file mode 100644 index db3133a5ec..0000000000 --- a/src/soc/intel/common/block/pcr/Makefile.inc +++ /dev/null @@ -1,6 +0,0 @@ -## SPDX-License-Identifier: GPL-2.0-only -bootblock-$(CONFIG_SOC_INTEL_COMMON_BLOCK_PCR) += pcr.c -romstage-$(CONFIG_SOC_INTEL_COMMON_BLOCK_PCR) += pcr.c -ramstage-$(CONFIG_SOC_INTEL_COMMON_BLOCK_PCR) += pcr.c -smm-$(CONFIG_SOC_INTEL_COMMON_BLOCK_PCR) += pcr.c -verstage-$(CONFIG_SOC_INTEL_COMMON_BLOCK_PCR) += pcr.c diff --git a/src/soc/intel/common/block/pcr/Makefile.mk b/src/soc/intel/common/block/pcr/Makefile.mk new file mode 100644 index 0000000000..db3133a5ec --- /dev/null +++ b/src/soc/intel/common/block/pcr/Makefile.mk @@ -0,0 +1,6 @@ +## SPDX-License-Identifier: GPL-2.0-only +bootblock-$(CONFIG_SOC_INTEL_COMMON_BLOCK_PCR) += pcr.c +romstage-$(CONFIG_SOC_INTEL_COMMON_BLOCK_PCR) += pcr.c +ramstage-$(CONFIG_SOC_INTEL_COMMON_BLOCK_PCR) += pcr.c +smm-$(CONFIG_SOC_INTEL_COMMON_BLOCK_PCR) += pcr.c +verstage-$(CONFIG_SOC_INTEL_COMMON_BLOCK_PCR) += pcr.c diff --git a/src/soc/intel/common/block/pmc/Makefile.inc b/src/soc/intel/common/block/pmc/Makefile.inc deleted file mode 100644 index e46d5ee7e0..0000000000 --- a/src/soc/intel/common/block/pmc/Makefile.inc +++ /dev/null @@ -1,11 +0,0 @@ -## SPDX-License-Identifier: GPL-2.0-only -ifeq ($(CONFIG_SOC_INTEL_COMMON_BLOCK_PMC),y) -bootblock-y += pmclib.c -romstage-y += pmclib.c -ramstage-$(CONFIG_SOC_INTEL_COMMON_BLOCK_PMC_DISCOVERABLE) += pmc.c -ramstage-y += pmclib.c -smm-y += pmclib.c -verstage-y += pmclib.c -postcar-y += pmclib.c -ramstage-$(CONFIG_PMC_IPC_ACPI_INTERFACE) += pmc_ipc.c -endif diff --git a/src/soc/intel/common/block/pmc/Makefile.mk b/src/soc/intel/common/block/pmc/Makefile.mk new file mode 100644 index 0000000000..e46d5ee7e0 --- /dev/null +++ b/src/soc/intel/common/block/pmc/Makefile.mk @@ -0,0 +1,11 @@ +## SPDX-License-Identifier: GPL-2.0-only +ifeq ($(CONFIG_SOC_INTEL_COMMON_BLOCK_PMC),y) +bootblock-y += pmclib.c +romstage-y += pmclib.c +ramstage-$(CONFIG_SOC_INTEL_COMMON_BLOCK_PMC_DISCOVERABLE) += pmc.c +ramstage-y += pmclib.c +smm-y += pmclib.c +verstage-y += pmclib.c +postcar-y += pmclib.c +ramstage-$(CONFIG_PMC_IPC_ACPI_INTERFACE) += pmc_ipc.c +endif diff --git a/src/soc/intel/common/block/power_limit/Makefile.inc b/src/soc/intel/common/block/power_limit/Makefile.inc deleted file mode 100644 index 8211eb7a4f..0000000000 --- a/src/soc/intel/common/block/power_limit/Makefile.inc +++ /dev/null @@ -1,2 +0,0 @@ -## SPDX-License-Identifier: GPL-2.0-only -ramstage-$(CONFIG_SOC_INTEL_COMMON_BLOCK_POWER_LIMIT) += power_limit.c diff --git a/src/soc/intel/common/block/power_limit/Makefile.mk b/src/soc/intel/common/block/power_limit/Makefile.mk new file mode 100644 index 0000000000..8211eb7a4f --- /dev/null +++ b/src/soc/intel/common/block/power_limit/Makefile.mk @@ -0,0 +1,2 @@ +## SPDX-License-Identifier: GPL-2.0-only +ramstage-$(CONFIG_SOC_INTEL_COMMON_BLOCK_POWER_LIMIT) += power_limit.c diff --git a/src/soc/intel/common/block/rtc/Makefile.inc b/src/soc/intel/common/block/rtc/Makefile.inc deleted file mode 100644 index 13ab7889ca..0000000000 --- a/src/soc/intel/common/block/rtc/Makefile.inc +++ /dev/null @@ -1,4 +0,0 @@ -## SPDX-License-Identifier: GPL-2.0-only -bootblock-$(CONFIG_SOC_INTEL_COMMON_BLOCK_RTC) += rtc.c -romstage-$(CONFIG_SOC_INTEL_COMMON_BLOCK_RTC) += rtc.c -ramstage-$(CONFIG_SOC_INTEL_COMMON_BLOCK_RTC) += rtc.c diff --git a/src/soc/intel/common/block/rtc/Makefile.mk b/src/soc/intel/common/block/rtc/Makefile.mk new file mode 100644 index 0000000000..13ab7889ca --- /dev/null +++ b/src/soc/intel/common/block/rtc/Makefile.mk @@ -0,0 +1,4 @@ +## SPDX-License-Identifier: GPL-2.0-only +bootblock-$(CONFIG_SOC_INTEL_COMMON_BLOCK_RTC) += rtc.c +romstage-$(CONFIG_SOC_INTEL_COMMON_BLOCK_RTC) += rtc.c +ramstage-$(CONFIG_SOC_INTEL_COMMON_BLOCK_RTC) += rtc.c diff --git a/src/soc/intel/common/block/sata/Makefile.inc b/src/soc/intel/common/block/sata/Makefile.inc deleted file mode 100644 index aabba8c730..0000000000 --- a/src/soc/intel/common/block/sata/Makefile.inc +++ /dev/null @@ -1,2 +0,0 @@ -## SPDX-License-Identifier: GPL-2.0-only -ramstage-$(CONFIG_SOC_INTEL_COMMON_BLOCK_SATA) += sata.c diff --git a/src/soc/intel/common/block/sata/Makefile.mk b/src/soc/intel/common/block/sata/Makefile.mk new file mode 100644 index 0000000000..aabba8c730 --- /dev/null +++ b/src/soc/intel/common/block/sata/Makefile.mk @@ -0,0 +1,2 @@ +## SPDX-License-Identifier: GPL-2.0-only +ramstage-$(CONFIG_SOC_INTEL_COMMON_BLOCK_SATA) += sata.c diff --git a/src/soc/intel/common/block/scs/Makefile.inc b/src/soc/intel/common/block/scs/Makefile.inc deleted file mode 100644 index 63a7213d6c..0000000000 --- a/src/soc/intel/common/block/scs/Makefile.inc +++ /dev/null @@ -1,6 +0,0 @@ -## SPDX-License-Identifier: GPL-2.0-only -ifneq ($(CONFIG_SOC_INTEL_ALDERLAKE_PCH_N),y) -ramstage-$(CONFIG_SOC_INTEL_COMMON_BLOCK_SCS) += sd.c -endif -ramstage-$(CONFIG_SOC_INTEL_COMMON_BLOCK_SCS) += mmc.c -romstage-$(CONFIG_SOC_INTEL_COMMON_EARLY_MMC_WAKE) += early_mmc.c diff --git a/src/soc/intel/common/block/scs/Makefile.mk b/src/soc/intel/common/block/scs/Makefile.mk new file mode 100644 index 0000000000..63a7213d6c --- /dev/null +++ b/src/soc/intel/common/block/scs/Makefile.mk @@ -0,0 +1,6 @@ +## SPDX-License-Identifier: GPL-2.0-only +ifneq ($(CONFIG_SOC_INTEL_ALDERLAKE_PCH_N),y) +ramstage-$(CONFIG_SOC_INTEL_COMMON_BLOCK_SCS) += sd.c +endif +ramstage-$(CONFIG_SOC_INTEL_COMMON_BLOCK_SCS) += mmc.c +romstage-$(CONFIG_SOC_INTEL_COMMON_EARLY_MMC_WAKE) += early_mmc.c diff --git a/src/soc/intel/common/block/sgx/Makefile.inc b/src/soc/intel/common/block/sgx/Makefile.inc deleted file mode 100644 index 84ca67fa34..0000000000 --- a/src/soc/intel/common/block/sgx/Makefile.inc +++ /dev/null @@ -1,2 +0,0 @@ -## SPDX-License-Identifier: GPL-2.0-only -ramstage-$(CONFIG_SOC_INTEL_COMMON_BLOCK_SGX_ENABLE) += sgx.c diff --git a/src/soc/intel/common/block/sgx/Makefile.mk b/src/soc/intel/common/block/sgx/Makefile.mk new file mode 100644 index 0000000000..84ca67fa34 --- /dev/null +++ b/src/soc/intel/common/block/sgx/Makefile.mk @@ -0,0 +1,2 @@ +## SPDX-License-Identifier: GPL-2.0-only +ramstage-$(CONFIG_SOC_INTEL_COMMON_BLOCK_SGX_ENABLE) += sgx.c diff --git a/src/soc/intel/common/block/smbus/Makefile.inc b/src/soc/intel/common/block/smbus/Makefile.inc deleted file mode 100644 index 777d92ad09..0000000000 --- a/src/soc/intel/common/block/smbus/Makefile.inc +++ /dev/null @@ -1,15 +0,0 @@ -## SPDX-License-Identifier: GPL-2.0-only -bootblock-$(CONFIG_SOC_INTEL_COMMON_BLOCK_SMBUS) += smbuslib.c -bootblock-$(CONFIG_SOC_INTEL_COMMON_BLOCK_SMBUS) += smbus_early.c -bootblock-$(CONFIG_SOC_INTEL_COMMON_BLOCK_TCO) += tco.c - -romstage-$(CONFIG_SOC_INTEL_COMMON_BLOCK_SMBUS) += smbuslib.c -romstage-$(CONFIG_SOC_INTEL_COMMON_BLOCK_SMBUS) += smbus_early.c -romstage-$(CONFIG_SOC_INTEL_COMMON_BLOCK_TCO) += tco.c - -ramstage-$(CONFIG_SOC_INTEL_COMMON_BLOCK_SMBUS) += smbus.c -ramstage-$(CONFIG_SOC_INTEL_COMMON_BLOCK_TCO) += tco.c - -postcar-$(CONFIG_SOC_INTEL_COMMON_BLOCK_TCO) += tco.c -smm-$(CONFIG_SOC_INTEL_COMMON_BLOCK_TCO) += tco.c -verstage-$(CONFIG_SOC_INTEL_COMMON_BLOCK_TCO) += tco.c diff --git a/src/soc/intel/common/block/smbus/Makefile.mk b/src/soc/intel/common/block/smbus/Makefile.mk new file mode 100644 index 0000000000..777d92ad09 --- /dev/null +++ b/src/soc/intel/common/block/smbus/Makefile.mk @@ -0,0 +1,15 @@ +## SPDX-License-Identifier: GPL-2.0-only +bootblock-$(CONFIG_SOC_INTEL_COMMON_BLOCK_SMBUS) += smbuslib.c +bootblock-$(CONFIG_SOC_INTEL_COMMON_BLOCK_SMBUS) += smbus_early.c +bootblock-$(CONFIG_SOC_INTEL_COMMON_BLOCK_TCO) += tco.c + +romstage-$(CONFIG_SOC_INTEL_COMMON_BLOCK_SMBUS) += smbuslib.c +romstage-$(CONFIG_SOC_INTEL_COMMON_BLOCK_SMBUS) += smbus_early.c +romstage-$(CONFIG_SOC_INTEL_COMMON_BLOCK_TCO) += tco.c + +ramstage-$(CONFIG_SOC_INTEL_COMMON_BLOCK_SMBUS) += smbus.c +ramstage-$(CONFIG_SOC_INTEL_COMMON_BLOCK_TCO) += tco.c + +postcar-$(CONFIG_SOC_INTEL_COMMON_BLOCK_TCO) += tco.c +smm-$(CONFIG_SOC_INTEL_COMMON_BLOCK_TCO) += tco.c +verstage-$(CONFIG_SOC_INTEL_COMMON_BLOCK_TCO) += tco.c diff --git a/src/soc/intel/common/block/smm/Makefile.inc b/src/soc/intel/common/block/smm/Makefile.inc deleted file mode 100644 index 318cd627c2..0000000000 --- a/src/soc/intel/common/block/smm/Makefile.inc +++ /dev/null @@ -1,7 +0,0 @@ -## SPDX-License-Identifier: GPL-2.0-only -bootblock-$(CONFIG_SOC_INTEL_COMMON_BLOCK_SMM) += smm.c -romstage-$(CONFIG_SOC_INTEL_COMMON_BLOCK_SMM) += smm.c -postcar-$(CONFIG_SOC_INTEL_COMMON_BLOCK_SMM) += smm.c -ramstage-$(CONFIG_SOC_INTEL_COMMON_BLOCK_SMM) += smm.c -smm-$(CONFIG_SOC_INTEL_COMMON_BLOCK_SMM) += smihandler.c -smm-$(CONFIG_SOC_INTEL_COMMON_BLOCK_SMM_IO_TRAP) += smitraphandler.c diff --git a/src/soc/intel/common/block/smm/Makefile.mk b/src/soc/intel/common/block/smm/Makefile.mk new file mode 100644 index 0000000000..318cd627c2 --- /dev/null +++ b/src/soc/intel/common/block/smm/Makefile.mk @@ -0,0 +1,7 @@ +## SPDX-License-Identifier: GPL-2.0-only +bootblock-$(CONFIG_SOC_INTEL_COMMON_BLOCK_SMM) += smm.c +romstage-$(CONFIG_SOC_INTEL_COMMON_BLOCK_SMM) += smm.c +postcar-$(CONFIG_SOC_INTEL_COMMON_BLOCK_SMM) += smm.c +ramstage-$(CONFIG_SOC_INTEL_COMMON_BLOCK_SMM) += smm.c +smm-$(CONFIG_SOC_INTEL_COMMON_BLOCK_SMM) += smihandler.c +smm-$(CONFIG_SOC_INTEL_COMMON_BLOCK_SMM_IO_TRAP) += smitraphandler.c diff --git a/src/soc/intel/common/block/spi/Makefile.inc b/src/soc/intel/common/block/spi/Makefile.inc deleted file mode 100644 index a95d605f71..0000000000 --- a/src/soc/intel/common/block/spi/Makefile.inc +++ /dev/null @@ -1,14 +0,0 @@ -## SPDX-License-Identifier: GPL-2.0-only -ifeq ($(CONFIG_SOC_INTEL_COMMON_BLOCK_SPI),y) -bootblock-y += spi.c - -verstage-y += spi.c - -romstage-y += spi.c - -ramstage-y += spi.c - -postcar-y += spi.c - -smm-$(CONFIG_SPI_FLASH_SMM) += spi.c -endif diff --git a/src/soc/intel/common/block/spi/Makefile.mk b/src/soc/intel/common/block/spi/Makefile.mk new file mode 100644 index 0000000000..a95d605f71 --- /dev/null +++ b/src/soc/intel/common/block/spi/Makefile.mk @@ -0,0 +1,14 @@ +## SPDX-License-Identifier: GPL-2.0-only +ifeq ($(CONFIG_SOC_INTEL_COMMON_BLOCK_SPI),y) +bootblock-y += spi.c + +verstage-y += spi.c + +romstage-y += spi.c + +ramstage-y += spi.c + +postcar-y += spi.c + +smm-$(CONFIG_SPI_FLASH_SMM) += spi.c +endif diff --git a/src/soc/intel/common/block/sram/Makefile.inc b/src/soc/intel/common/block/sram/Makefile.inc deleted file mode 100644 index 5597741e28..0000000000 --- a/src/soc/intel/common/block/sram/Makefile.inc +++ /dev/null @@ -1,2 +0,0 @@ -## SPDX-License-Identifier: GPL-2.0-only -ramstage-$(CONFIG_SOC_INTEL_COMMON_BLOCK_SRAM) += sram.c diff --git a/src/soc/intel/common/block/sram/Makefile.mk b/src/soc/intel/common/block/sram/Makefile.mk new file mode 100644 index 0000000000..5597741e28 --- /dev/null +++ b/src/soc/intel/common/block/sram/Makefile.mk @@ -0,0 +1,2 @@ +## SPDX-License-Identifier: GPL-2.0-only +ramstage-$(CONFIG_SOC_INTEL_COMMON_BLOCK_SRAM) += sram.c diff --git a/src/soc/intel/common/block/systemagent/Makefile.inc b/src/soc/intel/common/block/systemagent/Makefile.inc deleted file mode 100644 index fe7a71cbcc..0000000000 --- a/src/soc/intel/common/block/systemagent/Makefile.inc +++ /dev/null @@ -1,9 +0,0 @@ -## SPDX-License-Identifier: GPL-2.0-only -bootblock-$(CONFIG_SOC_INTEL_COMMON_BLOCK_SA) += systemagent_early.c -romstage-$(CONFIG_SOC_INTEL_COMMON_BLOCK_SA) += systemagent_early.c -ramstage-$(CONFIG_SOC_INTEL_COMMON_BLOCK_SA) += systemagent_early.c -postcar-$(CONFIG_SOC_INTEL_COMMON_BLOCK_SA) += systemagent_early.c -ramstage-$(CONFIG_SOC_INTEL_COMMON_BLOCK_SA) += systemagent.c -romstage-$(CONFIG_SOC_INTEL_COMMON_BLOCK_SA) += memmap.c -ramstage-$(CONFIG_SOC_INTEL_COMMON_BLOCK_SA) += memmap.c -postcar-$(CONFIG_SOC_INTEL_COMMON_BLOCK_SA) += memmap.c diff --git a/src/soc/intel/common/block/systemagent/Makefile.mk b/src/soc/intel/common/block/systemagent/Makefile.mk new file mode 100644 index 0000000000..fe7a71cbcc --- /dev/null +++ b/src/soc/intel/common/block/systemagent/Makefile.mk @@ -0,0 +1,9 @@ +## SPDX-License-Identifier: GPL-2.0-only +bootblock-$(CONFIG_SOC_INTEL_COMMON_BLOCK_SA) += systemagent_early.c +romstage-$(CONFIG_SOC_INTEL_COMMON_BLOCK_SA) += systemagent_early.c +ramstage-$(CONFIG_SOC_INTEL_COMMON_BLOCK_SA) += systemagent_early.c +postcar-$(CONFIG_SOC_INTEL_COMMON_BLOCK_SA) += systemagent_early.c +ramstage-$(CONFIG_SOC_INTEL_COMMON_BLOCK_SA) += systemagent.c +romstage-$(CONFIG_SOC_INTEL_COMMON_BLOCK_SA) += memmap.c +ramstage-$(CONFIG_SOC_INTEL_COMMON_BLOCK_SA) += memmap.c +postcar-$(CONFIG_SOC_INTEL_COMMON_BLOCK_SA) += memmap.c diff --git a/src/soc/intel/common/block/tcss/Makefile.inc b/src/soc/intel/common/block/tcss/Makefile.inc deleted file mode 100644 index 3c1bf5f97e..0000000000 --- a/src/soc/intel/common/block/tcss/Makefile.inc +++ /dev/null @@ -1,2 +0,0 @@ -## SPDX-License-Identifier: GPL-2.0-only -ramstage-$(CONFIG_SOC_INTEL_COMMON_BLOCK_TCSS) += tcss.c diff --git a/src/soc/intel/common/block/tcss/Makefile.mk b/src/soc/intel/common/block/tcss/Makefile.mk new file mode 100644 index 0000000000..3c1bf5f97e --- /dev/null +++ b/src/soc/intel/common/block/tcss/Makefile.mk @@ -0,0 +1,2 @@ +## SPDX-License-Identifier: GPL-2.0-only +ramstage-$(CONFIG_SOC_INTEL_COMMON_BLOCK_TCSS) += tcss.c diff --git a/src/soc/intel/common/block/thermal/Makefile.inc b/src/soc/intel/common/block/thermal/Makefile.inc deleted file mode 100644 index 24d29f73a5..0000000000 --- a/src/soc/intel/common/block/thermal/Makefile.inc +++ /dev/null @@ -1,6 +0,0 @@ -## SPDX-License-Identifier: GPL-2.0-only -romstage-$(CONFIG_SOC_INTEL_COMMON_BLOCK_THERMAL) += thermal_common.c -romstage-$(CONFIG_SOC_INTEL_COMMON_BLOCK_THERMAL_PCI_DEV) += thermal_pci.c -romstage-$(CONFIG_SOC_INTEL_COMMON_BLOCK_THERMAL_BEHIND_PMC) += thermal_pmc.c -ramstage-$(CONFIG_SOC_INTEL_COMMON_BLOCK_THERMAL) += thermal_common.c -ramstage-$(CONFIG_SOC_INTEL_COMMON_BLOCK_THERMAL_PCI_DEV) += thermal_pci.c diff --git a/src/soc/intel/common/block/thermal/Makefile.mk b/src/soc/intel/common/block/thermal/Makefile.mk new file mode 100644 index 0000000000..24d29f73a5 --- /dev/null +++ b/src/soc/intel/common/block/thermal/Makefile.mk @@ -0,0 +1,6 @@ +## SPDX-License-Identifier: GPL-2.0-only +romstage-$(CONFIG_SOC_INTEL_COMMON_BLOCK_THERMAL) += thermal_common.c +romstage-$(CONFIG_SOC_INTEL_COMMON_BLOCK_THERMAL_PCI_DEV) += thermal_pci.c +romstage-$(CONFIG_SOC_INTEL_COMMON_BLOCK_THERMAL_BEHIND_PMC) += thermal_pmc.c +ramstage-$(CONFIG_SOC_INTEL_COMMON_BLOCK_THERMAL) += thermal_common.c +ramstage-$(CONFIG_SOC_INTEL_COMMON_BLOCK_THERMAL_PCI_DEV) += thermal_pci.c diff --git a/src/soc/intel/common/block/timer/Makefile.inc b/src/soc/intel/common/block/timer/Makefile.inc deleted file mode 100644 index bb69fab199..0000000000 --- a/src/soc/intel/common/block/timer/Makefile.inc +++ /dev/null @@ -1,7 +0,0 @@ -## SPDX-License-Identifier: GPL-2.0-only -bootblock-$(CONFIG_SOC_INTEL_COMMON_BLOCK_TIMER) += timer.c -verstage-$(CONFIG_SOC_INTEL_COMMON_BLOCK_TIMER) += timer.c -romstage-$(CONFIG_SOC_INTEL_COMMON_BLOCK_TIMER) += timer.c -ramstage-$(CONFIG_SOC_INTEL_COMMON_BLOCK_TIMER) += timer.c -smm-$(CONFIG_SOC_INTEL_COMMON_BLOCK_TIMER) += timer.c -postcar-$(CONFIG_SOC_INTEL_COMMON_BLOCK_TIMER) += timer.c diff --git a/src/soc/intel/common/block/timer/Makefile.mk b/src/soc/intel/common/block/timer/Makefile.mk new file mode 100644 index 0000000000..bb69fab199 --- /dev/null +++ b/src/soc/intel/common/block/timer/Makefile.mk @@ -0,0 +1,7 @@ +## SPDX-License-Identifier: GPL-2.0-only +bootblock-$(CONFIG_SOC_INTEL_COMMON_BLOCK_TIMER) += timer.c +verstage-$(CONFIG_SOC_INTEL_COMMON_BLOCK_TIMER) += timer.c +romstage-$(CONFIG_SOC_INTEL_COMMON_BLOCK_TIMER) += timer.c +ramstage-$(CONFIG_SOC_INTEL_COMMON_BLOCK_TIMER) += timer.c +smm-$(CONFIG_SOC_INTEL_COMMON_BLOCK_TIMER) += timer.c +postcar-$(CONFIG_SOC_INTEL_COMMON_BLOCK_TIMER) += timer.c diff --git a/src/soc/intel/common/block/tracehub/Makefile.inc b/src/soc/intel/common/block/tracehub/Makefile.inc deleted file mode 100644 index aabed8767d..0000000000 --- a/src/soc/intel/common/block/tracehub/Makefile.inc +++ /dev/null @@ -1,2 +0,0 @@ -## SPDX-License-Identifier: GPL-2.0-only -ramstage-$(CONFIG_SOC_INTEL_COMMON_BLOCK_TRACEHUB) += tracehub.c diff --git a/src/soc/intel/common/block/tracehub/Makefile.mk b/src/soc/intel/common/block/tracehub/Makefile.mk new file mode 100644 index 0000000000..aabed8767d --- /dev/null +++ b/src/soc/intel/common/block/tracehub/Makefile.mk @@ -0,0 +1,2 @@ +## SPDX-License-Identifier: GPL-2.0-only +ramstage-$(CONFIG_SOC_INTEL_COMMON_BLOCK_TRACEHUB) += tracehub.c diff --git a/src/soc/intel/common/block/uart/Makefile.inc b/src/soc/intel/common/block/uart/Makefile.inc deleted file mode 100644 index ded8719929..0000000000 --- a/src/soc/intel/common/block/uart/Makefile.inc +++ /dev/null @@ -1,7 +0,0 @@ -## SPDX-License-Identifier: GPL-2.0-only -bootblock-$(CONFIG_SOC_INTEL_COMMON_BLOCK_UART) += uart.c -romstage-$(CONFIG_SOC_INTEL_COMMON_BLOCK_UART) += uart.c -ramstage-$(CONFIG_SOC_INTEL_COMMON_BLOCK_UART) += uart.c -smm-$(CONFIG_SOC_INTEL_COMMON_BLOCK_UART) += uart.c -postcar-$(CONFIG_SOC_INTEL_COMMON_BLOCK_UART) += uart.c -verstage-$(CONFIG_SOC_INTEL_COMMON_BLOCK_UART) += uart.c diff --git a/src/soc/intel/common/block/uart/Makefile.mk b/src/soc/intel/common/block/uart/Makefile.mk new file mode 100644 index 0000000000..ded8719929 --- /dev/null +++ b/src/soc/intel/common/block/uart/Makefile.mk @@ -0,0 +1,7 @@ +## SPDX-License-Identifier: GPL-2.0-only +bootblock-$(CONFIG_SOC_INTEL_COMMON_BLOCK_UART) += uart.c +romstage-$(CONFIG_SOC_INTEL_COMMON_BLOCK_UART) += uart.c +ramstage-$(CONFIG_SOC_INTEL_COMMON_BLOCK_UART) += uart.c +smm-$(CONFIG_SOC_INTEL_COMMON_BLOCK_UART) += uart.c +postcar-$(CONFIG_SOC_INTEL_COMMON_BLOCK_UART) += uart.c +verstage-$(CONFIG_SOC_INTEL_COMMON_BLOCK_UART) += uart.c diff --git a/src/soc/intel/common/block/usb4/Makefile.inc b/src/soc/intel/common/block/usb4/Makefile.inc deleted file mode 100644 index 760cf1c465..0000000000 --- a/src/soc/intel/common/block/usb4/Makefile.inc +++ /dev/null @@ -1,4 +0,0 @@ -## SPDX-License-Identifier: GPL-2.0-only -ramstage-$(CONFIG_SOC_INTEL_COMMON_BLOCK_USB4) += usb4.c -ramstage-$(CONFIG_SOC_INTEL_COMMON_BLOCK_USB4_PCIE) += pcie.c -ramstage-$(CONFIG_SOC_INTEL_COMMON_BLOCK_USB4_XHCI) += xhci.c diff --git a/src/soc/intel/common/block/usb4/Makefile.mk b/src/soc/intel/common/block/usb4/Makefile.mk new file mode 100644 index 0000000000..760cf1c465 --- /dev/null +++ b/src/soc/intel/common/block/usb4/Makefile.mk @@ -0,0 +1,4 @@ +## SPDX-License-Identifier: GPL-2.0-only +ramstage-$(CONFIG_SOC_INTEL_COMMON_BLOCK_USB4) += usb4.c +ramstage-$(CONFIG_SOC_INTEL_COMMON_BLOCK_USB4_PCIE) += pcie.c +ramstage-$(CONFIG_SOC_INTEL_COMMON_BLOCK_USB4_XHCI) += xhci.c diff --git a/src/soc/intel/common/block/vtd/Makefile.inc b/src/soc/intel/common/block/vtd/Makefile.inc deleted file mode 100644 index e717f2b8aa..0000000000 --- a/src/soc/intel/common/block/vtd/Makefile.inc +++ /dev/null @@ -1,8 +0,0 @@ -## SPDX-License-Identifier: GPL-2.0-only - -# VT-d will not be functional in bootblock and verstage yet. -# It will become available after FSP memory init. -# If coreboot does native VT-d initialization, early DMA protection -# could be enabled in bootblock already. -romstage-$(CONFIG_SOC_INTEL_COMMON_BLOCK_VTD) += vtd.c -ramstage-$(CONFIG_SOC_INTEL_COMMON_BLOCK_VTD) += vtd.c diff --git a/src/soc/intel/common/block/vtd/Makefile.mk b/src/soc/intel/common/block/vtd/Makefile.mk new file mode 100644 index 0000000000..e717f2b8aa --- /dev/null +++ b/src/soc/intel/common/block/vtd/Makefile.mk @@ -0,0 +1,8 @@ +## SPDX-License-Identifier: GPL-2.0-only + +# VT-d will not be functional in bootblock and verstage yet. +# It will become available after FSP memory init. +# If coreboot does native VT-d initialization, early DMA protection +# could be enabled in bootblock already. +romstage-$(CONFIG_SOC_INTEL_COMMON_BLOCK_VTD) += vtd.c +ramstage-$(CONFIG_SOC_INTEL_COMMON_BLOCK_VTD) += vtd.c diff --git a/src/soc/intel/common/block/xdci/Makefile.inc b/src/soc/intel/common/block/xdci/Makefile.inc deleted file mode 100644 index 97859a8015..0000000000 --- a/src/soc/intel/common/block/xdci/Makefile.inc +++ /dev/null @@ -1,2 +0,0 @@ -## SPDX-License-Identifier: GPL-2.0-only -ramstage-$(CONFIG_SOC_INTEL_COMMON_BLOCK_XDCI) += xdci.c diff --git a/src/soc/intel/common/block/xdci/Makefile.mk b/src/soc/intel/common/block/xdci/Makefile.mk new file mode 100644 index 0000000000..97859a8015 --- /dev/null +++ b/src/soc/intel/common/block/xdci/Makefile.mk @@ -0,0 +1,2 @@ +## SPDX-License-Identifier: GPL-2.0-only +ramstage-$(CONFIG_SOC_INTEL_COMMON_BLOCK_XDCI) += xdci.c diff --git a/src/soc/intel/common/block/xhci/Makefile.inc b/src/soc/intel/common/block/xhci/Makefile.inc deleted file mode 100644 index f1ef3e5f6f..0000000000 --- a/src/soc/intel/common/block/xhci/Makefile.inc +++ /dev/null @@ -1,6 +0,0 @@ -## SPDX-License-Identifier: GPL-2.0-only -ramstage-$(CONFIG_SOC_INTEL_COMMON_BLOCK_XHCI) += xhci.c -ramstage-$(CONFIG_SOC_INTEL_COMMON_BLOCK_XHCI_ELOG) += elog.c - -smm-$(CONFIG_SOC_INTEL_COMMON_BLOCK_XHCI) += xhci.c -smm-$(CONFIG_SOC_INTEL_COMMON_BLOCK_XHCI_ELOG) += elog.c diff --git a/src/soc/intel/common/block/xhci/Makefile.mk b/src/soc/intel/common/block/xhci/Makefile.mk new file mode 100644 index 0000000000..f1ef3e5f6f --- /dev/null +++ b/src/soc/intel/common/block/xhci/Makefile.mk @@ -0,0 +1,6 @@ +## SPDX-License-Identifier: GPL-2.0-only +ramstage-$(CONFIG_SOC_INTEL_COMMON_BLOCK_XHCI) += xhci.c +ramstage-$(CONFIG_SOC_INTEL_COMMON_BLOCK_XHCI_ELOG) += elog.c + +smm-$(CONFIG_SOC_INTEL_COMMON_BLOCK_XHCI) += xhci.c +smm-$(CONFIG_SOC_INTEL_COMMON_BLOCK_XHCI_ELOG) += elog.c diff --git a/src/soc/intel/common/pch/Makefile.inc b/src/soc/intel/common/pch/Makefile.inc deleted file mode 100644 index 19c17d579c..0000000000 --- a/src/soc/intel/common/pch/Makefile.inc +++ /dev/null @@ -1,6 +0,0 @@ -## SPDX-License-Identifier: GPL-2.0-only -subdirs-$(CONFIG_SOC_INTEL_COMMON_PCH_BASE) += ./* - -ifeq ($(CONFIG_SOC_INTEL_COMMON_PCH_BASE),y) -CPPFLAGS_common += -I$(src)/soc/intel/common/pch/include/ -endif diff --git a/src/soc/intel/common/pch/Makefile.mk b/src/soc/intel/common/pch/Makefile.mk new file mode 100644 index 0000000000..19c17d579c --- /dev/null +++ b/src/soc/intel/common/pch/Makefile.mk @@ -0,0 +1,6 @@ +## SPDX-License-Identifier: GPL-2.0-only +subdirs-$(CONFIG_SOC_INTEL_COMMON_PCH_BASE) += ./* + +ifeq ($(CONFIG_SOC_INTEL_COMMON_PCH_BASE),y) +CPPFLAGS_common += -I$(src)/soc/intel/common/pch/include/ +endif diff --git a/src/soc/intel/common/pch/lockdown/Makefile.inc b/src/soc/intel/common/pch/lockdown/Makefile.inc deleted file mode 100644 index 71466f8edd..0000000000 --- a/src/soc/intel/common/pch/lockdown/Makefile.inc +++ /dev/null @@ -1,2 +0,0 @@ -## SPDX-License-Identifier: GPL-2.0-only -ramstage-$(CONFIG_SOC_INTEL_COMMON_PCH_LOCKDOWN) += lockdown.c diff --git a/src/soc/intel/common/pch/lockdown/Makefile.mk b/src/soc/intel/common/pch/lockdown/Makefile.mk new file mode 100644 index 0000000000..71466f8edd --- /dev/null +++ b/src/soc/intel/common/pch/lockdown/Makefile.mk @@ -0,0 +1,2 @@ +## SPDX-License-Identifier: GPL-2.0-only +ramstage-$(CONFIG_SOC_INTEL_COMMON_PCH_LOCKDOWN) += lockdown.c diff --git a/src/soc/intel/denverton_ns/Makefile.inc b/src/soc/intel/denverton_ns/Makefile.inc deleted file mode 100644 index 5d9b32773b..0000000000 --- a/src/soc/intel/denverton_ns/Makefile.inc +++ /dev/null @@ -1,75 +0,0 @@ -## SPDX-License-Identifier: GPL-2.0-only - -ifeq ($(CONFIG_SOC_INTEL_DENVERTON_NS),y) - -subdirs-y += ../../../cpu/intel/microcode -subdirs-y += ../../../cpu/intel/turbo - -bootblock-y += bootblock/bootblock.c -bootblock-y += spi.c -bootblock-y += tsc_freq.c -bootblock-$(CONFIG_CONSOLE_SERIAL) += bootblock/uart.c -bootblock-$(CONFIG_DRIVERS_UART_8250MEM) += uart_debug.c - -postcar-y += memmap.c -postcar-y += spi.c -postcar-y += tsc_freq.c -postcar-$(CONFIG_DRIVERS_UART_8250MEM) += uart_debug.c - -romstage-y += memmap.c -romstage-y += reset.c -romstage-y += ../../../cpu/intel/car/romstage.c -romstage-y += romstage.c -romstage-y += tsc_freq.c -romstage-y += gpio_dnv.c -romstage-y += gpio.c -romstage-y += soc_util.c -romstage-y += spi.c -romstage-y += fiamux.c -romstage-$(CONFIG_DRIVERS_UART_8250MEM) += uart_debug.c -romstage-$(CONFIG_DISPLAY_UPD_DATA) += upd_display.c -romstage-$(CONFIG_DISPLAY_HOBS) += hob_display.c - -ramstage-y += memmap.c -ramstage-y += systemagent.c -ramstage-y += reset.c -ramstage-y += chip.c -ramstage-y += soc_util.c -ramstage-y += uart.c -ramstage-y += xhci.c -ramstage-y += csme_ie_kt.c -ramstage-y += lpc.c -ramstage-y += pmc.c -ramstage-y += npk.c -ramstage-y += sata.c -ramstage-y += cpu.c -ramstage-y += tsc_freq.c -ramstage-y += spi.c -ramstage-y += fiamux.c -ramstage-y += hob_mem.c -ramstage-y += gpio.c -ramstage-$(CONFIG_DRIVERS_UART_8250MEM) += uart_debug.c -ramstage-$(CONFIG_HAVE_ACPI_TABLES) += acpi.c -ramstage-$(CONFIG_HAVE_SMI_HANDLER) += smm.c -ramstage-$(CONFIG_HAVE_SMI_HANDLER) += pmutil.c -ramstage-$(CONFIG_DISPLAY_UPD_DATA) += upd_display.c -ramstage-$(CONFIG_DISPLAY_HOBS) += hob_display.c - -smm-y += pmutil.c -smm-y += soc_util.c -smm-y += smihandler.c -smm-y += tsc_freq.c -smm-$(CONFIG_SPI_FLASH_SMM) += spi.c -smm-$(CONFIG_DRIVERS_UART_8250MEM) += uart_debug.c - -verstage-y += memmap.c -verstage-y += reset.c -verstage-y += spi.c -verstage-y += tsc_freq.c -verstage-$(CONFIG_DRIVERS_UART_8250MEM) += uart_debug.c - -CPPFLAGS_common += -I$(src)/soc/intel/denverton_ns/include - -cpu_microcode_bins += 3rdparty/intel-microcode/intel-ucode/06-5f-01 - -endif ## CONFIG_SOC_INTEL_DENVERTON_NS diff --git a/src/soc/intel/denverton_ns/Makefile.mk b/src/soc/intel/denverton_ns/Makefile.mk new file mode 100644 index 0000000000..5d9b32773b --- /dev/null +++ b/src/soc/intel/denverton_ns/Makefile.mk @@ -0,0 +1,75 @@ +## SPDX-License-Identifier: GPL-2.0-only + +ifeq ($(CONFIG_SOC_INTEL_DENVERTON_NS),y) + +subdirs-y += ../../../cpu/intel/microcode +subdirs-y += ../../../cpu/intel/turbo + +bootblock-y += bootblock/bootblock.c +bootblock-y += spi.c +bootblock-y += tsc_freq.c +bootblock-$(CONFIG_CONSOLE_SERIAL) += bootblock/uart.c +bootblock-$(CONFIG_DRIVERS_UART_8250MEM) += uart_debug.c + +postcar-y += memmap.c +postcar-y += spi.c +postcar-y += tsc_freq.c +postcar-$(CONFIG_DRIVERS_UART_8250MEM) += uart_debug.c + +romstage-y += memmap.c +romstage-y += reset.c +romstage-y += ../../../cpu/intel/car/romstage.c +romstage-y += romstage.c +romstage-y += tsc_freq.c +romstage-y += gpio_dnv.c +romstage-y += gpio.c +romstage-y += soc_util.c +romstage-y += spi.c +romstage-y += fiamux.c +romstage-$(CONFIG_DRIVERS_UART_8250MEM) += uart_debug.c +romstage-$(CONFIG_DISPLAY_UPD_DATA) += upd_display.c +romstage-$(CONFIG_DISPLAY_HOBS) += hob_display.c + +ramstage-y += memmap.c +ramstage-y += systemagent.c +ramstage-y += reset.c +ramstage-y += chip.c +ramstage-y += soc_util.c +ramstage-y += uart.c +ramstage-y += xhci.c +ramstage-y += csme_ie_kt.c +ramstage-y += lpc.c +ramstage-y += pmc.c +ramstage-y += npk.c +ramstage-y += sata.c +ramstage-y += cpu.c +ramstage-y += tsc_freq.c +ramstage-y += spi.c +ramstage-y += fiamux.c +ramstage-y += hob_mem.c +ramstage-y += gpio.c +ramstage-$(CONFIG_DRIVERS_UART_8250MEM) += uart_debug.c +ramstage-$(CONFIG_HAVE_ACPI_TABLES) += acpi.c +ramstage-$(CONFIG_HAVE_SMI_HANDLER) += smm.c +ramstage-$(CONFIG_HAVE_SMI_HANDLER) += pmutil.c +ramstage-$(CONFIG_DISPLAY_UPD_DATA) += upd_display.c +ramstage-$(CONFIG_DISPLAY_HOBS) += hob_display.c + +smm-y += pmutil.c +smm-y += soc_util.c +smm-y += smihandler.c +smm-y += tsc_freq.c +smm-$(CONFIG_SPI_FLASH_SMM) += spi.c +smm-$(CONFIG_DRIVERS_UART_8250MEM) += uart_debug.c + +verstage-y += memmap.c +verstage-y += reset.c +verstage-y += spi.c +verstage-y += tsc_freq.c +verstage-$(CONFIG_DRIVERS_UART_8250MEM) += uart_debug.c + +CPPFLAGS_common += -I$(src)/soc/intel/denverton_ns/include + +cpu_microcode_bins += 3rdparty/intel-microcode/intel-ucode/06-5f-01 + +endif ## CONFIG_SOC_INTEL_DENVERTON_NS diff --git a/src/soc/intel/elkhartlake/Makefile.inc b/src/soc/intel/elkhartlake/Makefile.inc deleted file mode 100644 index b5f5f2ad74..0000000000 --- a/src/soc/intel/elkhartlake/Makefile.inc +++ /dev/null @@ -1,71 +0,0 @@ -## SPDX-License-Identifier: GPL-2.0-only -ifeq ($(CONFIG_SOC_INTEL_ELKHARTLAKE),y) - -subdirs-y += romstage -subdirs-y += ../../../cpu/intel/microcode -subdirs-y += ../../../cpu/intel/turbo - -# all (bootblock, verstage, romstage, postcar, ramstage) -all-y += gspi.c -all-y += i2c.c -all-y += pmutil.c -all-y += spi.c -all-y += uart.c - -bootblock-y += bootblock/bootblock.c -bootblock-y += bootblock/pch.c -bootblock-y += bootblock/report_platform.c -bootblock-y += espi.c -bootblock-y += gpio.c -bootblock-y += p2sb.c - -romstage-y += espi.c -romstage-y += gpio.c -romstage-y += meminit.c -romstage-y += pcie_rp.c -romstage-y += reset.c - -ramstage-y += acpi.c -ramstage-y += chip.c -ramstage-y += cpu.c -ramstage-y += espi.c -ramstage-y += finalize.c -ramstage-y += fsp_params.c -ramstage-y += gpio.c -ramstage-y += lockdown.c -ramstage-y += p2sb.c -ramstage-y += pcie_rp.c -ramstage-y += pmc.c -ramstage-y += reset.c -ramstage-y += systemagent.c -ramstage-y += sd.c -ramstage-$(CONFIG_EHL_TSN_DRIVER) += tsn_gbe.c - -smm-y += gpio.c -smm-y += p2sb.c -smm-y += pmutil.c -smm-y += smihandler.c -smm-y += uart.c - -verstage-y += gpio.c - -CPPFLAGS_common += -I$(src)/soc/intel/elkhartlake -CPPFLAGS_common += -I$(src)/soc/intel/elkhartlake/include - -# B0 stepping -cpu_microcode_bins += 3rdparty/intel-microcode/intel-ucode/06-96-01 -cbfs-files-$(CONFIG_ADD_PSE_IMAGE_TO_CBFS) += pse.bin -pse.bin-file := $(CONFIG_PSE_IMAGE_FILE) -pse.bin-type := raw -pse.bin-compression := lzma - -# Add a build time check if the PSE file size fits -ifeq ($(CONFIG_ADD_PSE_IMAGE_TO_CBFS),y) -ifeq ($(call int-gt,\ - $(call file-size,$(CONFIG_PSE_IMAGE_FILE))\ - $(shell printf "%d" $(call int-shift-left, $(CONFIG_PSE_FW_FILE_SIZE_KIB) 10))), 1) -$(error PSE binary larger than CONFIG_PSE_FW_FILE_SIZE_KIB.) -endif -endif # CONFIG_ADD_PSE_IMAGE_TO_CBFS - -endif diff --git a/src/soc/intel/elkhartlake/Makefile.mk b/src/soc/intel/elkhartlake/Makefile.mk new file mode 100644 index 0000000000..b5f5f2ad74 --- /dev/null +++ b/src/soc/intel/elkhartlake/Makefile.mk @@ -0,0 +1,71 @@ +## SPDX-License-Identifier: GPL-2.0-only +ifeq ($(CONFIG_SOC_INTEL_ELKHARTLAKE),y) + +subdirs-y += romstage +subdirs-y += ../../../cpu/intel/microcode +subdirs-y += ../../../cpu/intel/turbo + +# all (bootblock, verstage, romstage, postcar, ramstage) +all-y += gspi.c +all-y += i2c.c +all-y += pmutil.c +all-y += spi.c +all-y += uart.c + +bootblock-y += bootblock/bootblock.c +bootblock-y += bootblock/pch.c +bootblock-y += bootblock/report_platform.c +bootblock-y += espi.c +bootblock-y += gpio.c +bootblock-y += p2sb.c + +romstage-y += espi.c +romstage-y += gpio.c +romstage-y += meminit.c +romstage-y += pcie_rp.c +romstage-y += reset.c + +ramstage-y += acpi.c +ramstage-y += chip.c +ramstage-y += cpu.c +ramstage-y += espi.c +ramstage-y += finalize.c +ramstage-y += fsp_params.c +ramstage-y += gpio.c +ramstage-y += lockdown.c +ramstage-y += p2sb.c +ramstage-y += pcie_rp.c +ramstage-y += pmc.c +ramstage-y += reset.c +ramstage-y += systemagent.c +ramstage-y += sd.c +ramstage-$(CONFIG_EHL_TSN_DRIVER) += tsn_gbe.c + +smm-y += gpio.c +smm-y += p2sb.c +smm-y += pmutil.c +smm-y += smihandler.c +smm-y += uart.c + +verstage-y += gpio.c + +CPPFLAGS_common += -I$(src)/soc/intel/elkhartlake +CPPFLAGS_common += -I$(src)/soc/intel/elkhartlake/include + +# B0 stepping +cpu_microcode_bins += 3rdparty/intel-microcode/intel-ucode/06-96-01 +cbfs-files-$(CONFIG_ADD_PSE_IMAGE_TO_CBFS) += pse.bin +pse.bin-file := $(CONFIG_PSE_IMAGE_FILE) +pse.bin-type := raw +pse.bin-compression := lzma + +# Add a build time check if the PSE file size fits +ifeq ($(CONFIG_ADD_PSE_IMAGE_TO_CBFS),y) +ifeq ($(call int-gt,\ + $(call file-size,$(CONFIG_PSE_IMAGE_FILE))\ + $(shell printf "%d" $(call int-shift-left, $(CONFIG_PSE_FW_FILE_SIZE_KIB) 10))), 1) +$(error PSE binary larger than CONFIG_PSE_FW_FILE_SIZE_KIB.) +endif +endif # CONFIG_ADD_PSE_IMAGE_TO_CBFS + +endif diff --git a/src/soc/intel/elkhartlake/romstage/Makefile.inc b/src/soc/intel/elkhartlake/romstage/Makefile.inc deleted file mode 100644 index 99c1d2ca25..0000000000 --- a/src/soc/intel/elkhartlake/romstage/Makefile.inc +++ /dev/null @@ -1,6 +0,0 @@ -# SPDX-License-Identifier: GPL-2.0-only - -romstage-y += fsp_params.c -romstage-y += ../../../../cpu/intel/car/romstage.c -romstage-y += romstage.c -romstage-y += systemagent.c diff --git a/src/soc/intel/elkhartlake/romstage/Makefile.mk b/src/soc/intel/elkhartlake/romstage/Makefile.mk new file mode 100644 index 0000000000..99c1d2ca25 --- /dev/null +++ b/src/soc/intel/elkhartlake/romstage/Makefile.mk @@ -0,0 +1,6 @@ +# SPDX-License-Identifier: GPL-2.0-only + +romstage-y += fsp_params.c +romstage-y += ../../../../cpu/intel/car/romstage.c +romstage-y += romstage.c +romstage-y += systemagent.c diff --git a/src/soc/intel/jasperlake/Makefile.inc b/src/soc/intel/jasperlake/Makefile.inc deleted file mode 100644 index 31ea8657ee..0000000000 --- a/src/soc/intel/jasperlake/Makefile.inc +++ /dev/null @@ -1,59 +0,0 @@ -## SPDX-License-Identifier: GPL-2.0-only -ifeq ($(CONFIG_SOC_INTEL_JASPERLAKE),y) - -subdirs-y += romstage -subdirs-y += ../../../cpu/intel/microcode -subdirs-y += ../../../cpu/intel/turbo - -# all (bootblock, verstage, romstage, postcar, ramstage) -all-y += gspi.c -all-y += i2c.c -all-y += pmutil.c -all-y += spi.c -all-y += uart.c - -bootblock-y += bootblock/bootblock.c -bootblock-y += bootblock/pch.c -bootblock-y += bootblock/report_platform.c -bootblock-y += espi.c -bootblock-y += gpio.c -bootblock-y += p2sb.c - -romstage-y += espi.c -romstage-y += gpio.c -romstage-y += meminit.c -romstage-y += reset.c - -ramstage-y += acpi.c -ramstage-y += chip.c -ramstage-y += cpu.c -ramstage-y += elog.c -ramstage-y += espi.c -ramstage-y += finalize.c -ramstage-y += fsp_params.c -ramstage-y += gpio.c -ramstage-y += graphics.c -ramstage-y += lockdown.c -ramstage-y += p2sb.c -ramstage-y += pmc.c -ramstage-y += reset.c -ramstage-y += systemagent.c -ramstage-y += sd.c -ramstage-y += xhci.c - -smm-y += gpio.c -smm-y += p2sb.c -smm-y += pmutil.c -smm-y += smihandler.c -smm-y += uart.c -smm-y += elog.c -smm-y += xhci.c - -verstage-y += gpio.c - -CPPFLAGS_common += -I$(src)/soc/intel/jasperlake -CPPFLAGS_common += -I$(src)/soc/intel/jasperlake/include - -cpu_microcode_bins += 3rdparty/intel-microcode/intel-ucode/06-9c-00 - -endif diff --git a/src/soc/intel/jasperlake/Makefile.mk b/src/soc/intel/jasperlake/Makefile.mk new file mode 100644 index 0000000000..31ea8657ee --- /dev/null +++ b/src/soc/intel/jasperlake/Makefile.mk @@ -0,0 +1,59 @@ +## SPDX-License-Identifier: GPL-2.0-only +ifeq ($(CONFIG_SOC_INTEL_JASPERLAKE),y) + +subdirs-y += romstage +subdirs-y += ../../../cpu/intel/microcode +subdirs-y += ../../../cpu/intel/turbo + +# all (bootblock, verstage, romstage, postcar, ramstage) +all-y += gspi.c +all-y += i2c.c +all-y += pmutil.c +all-y += spi.c +all-y += uart.c + +bootblock-y += bootblock/bootblock.c +bootblock-y += bootblock/pch.c +bootblock-y += bootblock/report_platform.c +bootblock-y += espi.c +bootblock-y += gpio.c +bootblock-y += p2sb.c + +romstage-y += espi.c +romstage-y += gpio.c +romstage-y += meminit.c +romstage-y += reset.c + +ramstage-y += acpi.c +ramstage-y += chip.c +ramstage-y += cpu.c +ramstage-y += elog.c +ramstage-y += espi.c +ramstage-y += finalize.c +ramstage-y += fsp_params.c +ramstage-y += gpio.c +ramstage-y += graphics.c +ramstage-y += lockdown.c +ramstage-y += p2sb.c +ramstage-y += pmc.c +ramstage-y += reset.c +ramstage-y += systemagent.c +ramstage-y += sd.c +ramstage-y += xhci.c + +smm-y += gpio.c +smm-y += p2sb.c +smm-y += pmutil.c +smm-y += smihandler.c +smm-y += uart.c +smm-y += elog.c +smm-y += xhci.c + +verstage-y += gpio.c + +CPPFLAGS_common += -I$(src)/soc/intel/jasperlake +CPPFLAGS_common += -I$(src)/soc/intel/jasperlake/include + +cpu_microcode_bins += 3rdparty/intel-microcode/intel-ucode/06-9c-00 + +endif diff --git a/src/soc/intel/jasperlake/romstage/Makefile.inc b/src/soc/intel/jasperlake/romstage/Makefile.inc deleted file mode 100644 index 99c1d2ca25..0000000000 --- a/src/soc/intel/jasperlake/romstage/Makefile.inc +++ /dev/null @@ -1,6 +0,0 @@ -# SPDX-License-Identifier: GPL-2.0-only - -romstage-y += fsp_params.c -romstage-y += ../../../../cpu/intel/car/romstage.c -romstage-y += romstage.c -romstage-y += systemagent.c diff --git a/src/soc/intel/jasperlake/romstage/Makefile.mk b/src/soc/intel/jasperlake/romstage/Makefile.mk new file mode 100644 index 0000000000..99c1d2ca25 --- /dev/null +++ b/src/soc/intel/jasperlake/romstage/Makefile.mk @@ -0,0 +1,6 @@ +# SPDX-License-Identifier: GPL-2.0-only + +romstage-y += fsp_params.c +romstage-y += ../../../../cpu/intel/car/romstage.c +romstage-y += romstage.c +romstage-y += systemagent.c diff --git a/src/soc/intel/meteorlake/Makefile.inc b/src/soc/intel/meteorlake/Makefile.inc deleted file mode 100644 index 39a1d652f0..0000000000 --- a/src/soc/intel/meteorlake/Makefile.inc +++ /dev/null @@ -1,64 +0,0 @@ -## SPDX-License-Identifier: GPL-2.0-only -ifeq ($(CONFIG_SOC_INTEL_METEORLAKE),y) - -subdirs-y += romstage -subdirs-y += ../../../cpu/intel/microcode -subdirs-y += ../../../cpu/intel/turbo - -# all (bootblock, verstage, romstage, postcar, ramstage) -all-y += gspi.c -all-y += i2c.c -all-y += pmutil.c -all-y += spi.c -all-y += uart.c -all-y += gpio.c - -bootblock-y += bootblock/bootblock.c -bootblock-y += bootblock/ioe_die.c -bootblock-y += bootblock/report_platform.c -bootblock-y += bootblock/soc_die.c -bootblock-y += espi.c -bootblock-y += p2sb.c -bootblock-y += soc_info.c - -romstage-$(CONFIG_SOC_INTEL_CSE_PRE_CPU_RESET_TELEMETRY) += cse_telemetry.c -romstage-y += espi.c -romstage-y += meminit.c -romstage-y += pcie_rp.c -romstage-y += reset.c -romstage-y += soc_info.c - -ramstage-y += acpi.c -ramstage-y += chip.c -ramstage-y += cpu.c -ramstage-$(CONFIG_SOC_INTEL_CRASHLOG) += crashlog.c -ramstage-y += ioe_pmc.c -ramstage-y += elog.c -ramstage-y += espi.c -ramstage-y += finalize.c -ramstage-y += fsp_params.c -ramstage-y += lockdown.c -ramstage-y += p2sb.c -ramstage-y += pcie_rp.c -ramstage-y += pmc.c -ramstage-y += reset.c -ramstage-y += retimer.c -ramstage-y += soundwire.c -ramstage-y += systemagent.c -ramstage-y += tcss.c -ramstage-y += xhci.c -ramstage-y += soc_info.c - -smm-y += elog.c -smm-y += gpio.c -smm-y += p2sb.c -smm-y += pmutil.c -smm-y += smihandler.c -smm-y += soc_info.c -smm-y += uart.c -smm-y += xhci.c -CPPFLAGS_common += -I$(src)/soc/intel/meteorlake -CPPFLAGS_common += -I$(src)/soc/intel/meteorlake/include - -CFLAGS_common += -fshort-wchar -endif diff --git a/src/soc/intel/meteorlake/Makefile.mk b/src/soc/intel/meteorlake/Makefile.mk new file mode 100644 index 0000000000..39a1d652f0 --- /dev/null +++ b/src/soc/intel/meteorlake/Makefile.mk @@ -0,0 +1,64 @@ +## SPDX-License-Identifier: GPL-2.0-only +ifeq ($(CONFIG_SOC_INTEL_METEORLAKE),y) + +subdirs-y += romstage +subdirs-y += ../../../cpu/intel/microcode +subdirs-y += ../../../cpu/intel/turbo + +# all (bootblock, verstage, romstage, postcar, ramstage) +all-y += gspi.c +all-y += i2c.c +all-y += pmutil.c +all-y += spi.c +all-y += uart.c +all-y += gpio.c + +bootblock-y += bootblock/bootblock.c +bootblock-y += bootblock/ioe_die.c +bootblock-y += bootblock/report_platform.c +bootblock-y += bootblock/soc_die.c +bootblock-y += espi.c +bootblock-y += p2sb.c +bootblock-y += soc_info.c + +romstage-$(CONFIG_SOC_INTEL_CSE_PRE_CPU_RESET_TELEMETRY) += cse_telemetry.c +romstage-y += espi.c +romstage-y += meminit.c +romstage-y += pcie_rp.c +romstage-y += reset.c +romstage-y += soc_info.c + +ramstage-y += acpi.c +ramstage-y += chip.c +ramstage-y += cpu.c +ramstage-$(CONFIG_SOC_INTEL_CRASHLOG) += crashlog.c +ramstage-y += ioe_pmc.c +ramstage-y += elog.c +ramstage-y += espi.c +ramstage-y += finalize.c +ramstage-y += fsp_params.c +ramstage-y += lockdown.c +ramstage-y += p2sb.c +ramstage-y += pcie_rp.c +ramstage-y += pmc.c +ramstage-y += reset.c +ramstage-y += retimer.c +ramstage-y += soundwire.c +ramstage-y += systemagent.c +ramstage-y += tcss.c +ramstage-y += xhci.c +ramstage-y += soc_info.c + +smm-y += elog.c +smm-y += gpio.c +smm-y += p2sb.c +smm-y += pmutil.c +smm-y += smihandler.c +smm-y += soc_info.c +smm-y += uart.c +smm-y += xhci.c +CPPFLAGS_common += -I$(src)/soc/intel/meteorlake +CPPFLAGS_common += -I$(src)/soc/intel/meteorlake/include + +CFLAGS_common += -fshort-wchar +endif diff --git a/src/soc/intel/meteorlake/romstage/Makefile.inc b/src/soc/intel/meteorlake/romstage/Makefile.inc deleted file mode 100644 index 99c1d2ca25..0000000000 --- a/src/soc/intel/meteorlake/romstage/Makefile.inc +++ /dev/null @@ -1,6 +0,0 @@ -# SPDX-License-Identifier: GPL-2.0-only - -romstage-y += fsp_params.c -romstage-y += ../../../../cpu/intel/car/romstage.c -romstage-y += romstage.c -romstage-y += systemagent.c diff --git a/src/soc/intel/meteorlake/romstage/Makefile.mk b/src/soc/intel/meteorlake/romstage/Makefile.mk new file mode 100644 index 0000000000..99c1d2ca25 --- /dev/null +++ b/src/soc/intel/meteorlake/romstage/Makefile.mk @@ -0,0 +1,6 @@ +# SPDX-License-Identifier: GPL-2.0-only + +romstage-y += fsp_params.c +romstage-y += ../../../../cpu/intel/car/romstage.c +romstage-y += romstage.c +romstage-y += systemagent.c diff --git a/src/soc/intel/skylake/Makefile.inc b/src/soc/intel/skylake/Makefile.inc deleted file mode 100644 index 732a98ad6c..0000000000 --- a/src/soc/intel/skylake/Makefile.inc +++ /dev/null @@ -1,116 +0,0 @@ -## SPDX-License-Identifier: GPL-2.0-only -ifeq ($(CONFIG_SOC_INTEL_COMMON_SKYLAKE_BASE),y) - -subdirs-y += nhlt -subdirs-y += romstage -subdirs-y += ../../../cpu/intel/common -subdirs-y += ../../../cpu/intel/microcode -subdirs-y += ../../../cpu/intel/turbo - -bootblock-y += bootblock/bootblock.c -bootblock-y += i2c.c -bootblock-y += bootblock/pch.c -bootblock-y += bootblock/report_platform.c -bootblock-y += gpio.c -bootblock-y += gspi.c -bootblock-y += p2sb.c -bootblock-y += pmutil.c -bootblock-y += spi.c -bootblock-y += lpc.c -bootblock-y += uart.c - -verstage-y += gpio.c -verstage-y += gspi.c -verstage-y += pmutil.c -verstage-y += i2c.c -verstage-y += spi.c -verstage-y += uart.c - -romstage-y += gpio.c -romstage-y += gspi.c -romstage-y += i2c.c -romstage-y += me.c -romstage-y += pmutil.c -romstage-y += reset.c -romstage-y += spi.c -romstage-y += uart.c - -ramstage-$(CONFIG_HAVE_ACPI_TABLES) += acpi.c -ramstage-y += chip.c -ramstage-y += cpu.c -ramstage-y += elog.c -ramstage-y += fadt.c -ramstage-y += finalize.c -ramstage-y += gpio.c -ramstage-y += gspi.c -ramstage-y += i2c.c -ramstage-y += graphics.c -ramstage-y += irq.c -ramstage-y += lockdown.c -ramstage-y += lpc.c -ramstage-y += me.c -ramstage-y += p2sb.c -ramstage-y += pmc.c -ramstage-y += pmutil.c -ramstage-y += reset.c -ramstage-y += sd.c -ramstage-y += spi.c -ramstage-y += systemagent.c -ramstage-y += uart.c -ramstage-y += vr_config.c -ramstage-y += xhci.c - -smm-y += elog.c -smm-y += gpio.c -smm-y += p2sb.c -smm-y += pmutil.c -smm-y += smihandler.c -smm-y += uart.c -smm-y += xhci.c - -postcar-y += gspi.c -postcar-y += spi.c -postcar-y += i2c.c -postcar-y += uart.c - -ifeq ($(CONFIG_SKYLAKE_SOC_PCH_H),y) -ifeq ($(CONFIG_MAINBOARD_SUPPORTS_SKYLAKE_CPU),y) -# Skylake H Q0 -cpu_microcode_bins += 3rdparty/intel-microcode/intel-ucode/06-5e-03 -endif -ifeq ($(CONFIG_MAINBOARD_SUPPORTS_KABYLAKE_CPU),y) -# Kabylake H B0 S0 -cpu_microcode_bins += 3rdparty/intel-microcode/intel-ucode/06-9e-09 -endif -# CoffeeLake -ifeq ($(CONFIG_MAINBOARD_SUPPORTS_COFFEELAKE_CPU),y) -cpu_microcode_bins += 3rdparty/intel-microcode/intel-ucode/06-9e-0a -cpu_microcode_bins += 3rdparty/intel-microcode/intel-ucode/06-9e-0b -cpu_microcode_bins += 3rdparty/intel-microcode/intel-ucode/06-9e-0c -cpu_microcode_bins += 3rdparty/intel-microcode/intel-ucode/06-9e-0d -endif -else -ifeq ($(CONFIG_MAINBOARD_SUPPORTS_SKYLAKE_CPU),y) -# Skylake D0 -cpu_microcode_bins += 3rdparty/intel-microcode/intel-ucode/06-4e-03 -endif -ifeq ($(CONFIG_MAINBOARD_SUPPORTS_KABYLAKE_DUAL),y) -# Kabylake H0, J0, J1 -cpu_microcode_bins += 3rdparty/intel-microcode/intel-ucode/06-8e-09 -endif -ifeq ($(CONFIG_MAINBOARD_SUPPORTS_KABYLAKE_QUAD),y) -# Kabylake Y0 -cpu_microcode_bins += 3rdparty/intel-microcode/intel-ucode/06-8e-0a -endif -endif -# Missing for Skylake C0 (0x406e2), Kabylake G0 (0x406e8), Kabylake HA0 (0x506e8) -# since those are probably pre-release samples. - -CPPFLAGS_common += -I$(src)/soc/intel/skylake -CPPFLAGS_common += -I$(src)/soc/intel/skylake/include - -ifeq ($(CONFIG_BOARD_STARLABS_STARBOOK_ADL) $(CONFIG_BOARD_STARLABS_LABTOP_CML) $(CONFIG_BOARD_STARLABS_STARBOOK_TGL) $(CONFIG_BOARD_OCP_TIOGAPASS),y) -CPPFLAGS_common += -I3rdparty/blobs/mainboard/$(MAINBOARDDIR) -endif - -endif diff --git a/src/soc/intel/skylake/Makefile.mk b/src/soc/intel/skylake/Makefile.mk new file mode 100644 index 0000000000..732a98ad6c --- /dev/null +++ b/src/soc/intel/skylake/Makefile.mk @@ -0,0 +1,116 @@ +## SPDX-License-Identifier: GPL-2.0-only +ifeq ($(CONFIG_SOC_INTEL_COMMON_SKYLAKE_BASE),y) + +subdirs-y += nhlt +subdirs-y += romstage +subdirs-y += ../../../cpu/intel/common +subdirs-y += ../../../cpu/intel/microcode +subdirs-y += ../../../cpu/intel/turbo + +bootblock-y += bootblock/bootblock.c +bootblock-y += i2c.c +bootblock-y += bootblock/pch.c +bootblock-y += bootblock/report_platform.c +bootblock-y += gpio.c +bootblock-y += gspi.c +bootblock-y += p2sb.c +bootblock-y += pmutil.c +bootblock-y += spi.c +bootblock-y += lpc.c +bootblock-y += uart.c + +verstage-y += gpio.c +verstage-y += gspi.c +verstage-y += pmutil.c +verstage-y += i2c.c +verstage-y += spi.c +verstage-y += uart.c + +romstage-y += gpio.c +romstage-y += gspi.c +romstage-y += i2c.c +romstage-y += me.c +romstage-y += pmutil.c +romstage-y += reset.c +romstage-y += spi.c +romstage-y += uart.c + +ramstage-$(CONFIG_HAVE_ACPI_TABLES) += acpi.c +ramstage-y += chip.c +ramstage-y += cpu.c +ramstage-y += elog.c +ramstage-y += fadt.c +ramstage-y += finalize.c +ramstage-y += gpio.c +ramstage-y += gspi.c +ramstage-y += i2c.c +ramstage-y += graphics.c +ramstage-y += irq.c +ramstage-y += lockdown.c +ramstage-y += lpc.c +ramstage-y += me.c +ramstage-y += p2sb.c +ramstage-y += pmc.c +ramstage-y += pmutil.c +ramstage-y += reset.c +ramstage-y += sd.c +ramstage-y += spi.c +ramstage-y += systemagent.c +ramstage-y += uart.c +ramstage-y += vr_config.c +ramstage-y += xhci.c + +smm-y += elog.c +smm-y += gpio.c +smm-y += p2sb.c +smm-y += pmutil.c +smm-y += smihandler.c +smm-y += uart.c +smm-y += xhci.c + +postcar-y += gspi.c +postcar-y += spi.c +postcar-y += i2c.c +postcar-y += uart.c + +ifeq ($(CONFIG_SKYLAKE_SOC_PCH_H),y) +ifeq ($(CONFIG_MAINBOARD_SUPPORTS_SKYLAKE_CPU),y) +# Skylake H Q0 +cpu_microcode_bins += 3rdparty/intel-microcode/intel-ucode/06-5e-03 +endif +ifeq ($(CONFIG_MAINBOARD_SUPPORTS_KABYLAKE_CPU),y) +# Kabylake H B0 S0 +cpu_microcode_bins += 3rdparty/intel-microcode/intel-ucode/06-9e-09 +endif +# CoffeeLake +ifeq ($(CONFIG_MAINBOARD_SUPPORTS_COFFEELAKE_CPU),y) +cpu_microcode_bins += 3rdparty/intel-microcode/intel-ucode/06-9e-0a +cpu_microcode_bins += 3rdparty/intel-microcode/intel-ucode/06-9e-0b +cpu_microcode_bins += 3rdparty/intel-microcode/intel-ucode/06-9e-0c +cpu_microcode_bins += 3rdparty/intel-microcode/intel-ucode/06-9e-0d +endif +else +ifeq ($(CONFIG_MAINBOARD_SUPPORTS_SKYLAKE_CPU),y) +# Skylake D0 +cpu_microcode_bins += 3rdparty/intel-microcode/intel-ucode/06-4e-03 +endif +ifeq ($(CONFIG_MAINBOARD_SUPPORTS_KABYLAKE_DUAL),y) +# Kabylake H0, J0, J1 +cpu_microcode_bins += 3rdparty/intel-microcode/intel-ucode/06-8e-09 +endif +ifeq ($(CONFIG_MAINBOARD_SUPPORTS_KABYLAKE_QUAD),y) +# Kabylake Y0 +cpu_microcode_bins += 3rdparty/intel-microcode/intel-ucode/06-8e-0a +endif +endif +# Missing for Skylake C0 (0x406e2), Kabylake G0 (0x406e8), Kabylake HA0 (0x506e8) +# since those are probably pre-release samples. + +CPPFLAGS_common += -I$(src)/soc/intel/skylake +CPPFLAGS_common += -I$(src)/soc/intel/skylake/include + +ifeq ($(CONFIG_BOARD_STARLABS_STARBOOK_ADL) $(CONFIG_BOARD_STARLABS_LABTOP_CML) $(CONFIG_BOARD_STARLABS_STARBOOK_TGL) $(CONFIG_BOARD_OCP_TIOGAPASS),y) +CPPFLAGS_common += -I3rdparty/blobs/mainboard/$(MAINBOARDDIR) +endif + +endif diff --git a/src/soc/intel/skylake/nhlt/Makefile.inc b/src/soc/intel/skylake/nhlt/Makefile.inc deleted file mode 100644 index dda9662014..0000000000 --- a/src/soc/intel/skylake/nhlt/Makefile.inc +++ /dev/null @@ -1,98 +0,0 @@ -## SPDX-License-Identifier: GPL-2.0-only -ramstage-y += dmic.c -ramstage-y += nau88l25.c -ramstage-y += max98357.c -ramstage-y += max98373.c -ramstage-y += ssm4567.c -ramstage-y += rt5514.c -ramstage-y += rt5663.c -ramstage-y += max98927.c -ramstage-y += da7219.c - -# DSP firmware settings files. -ifeq ($(CONFIG_SOC_INTEL_KABYLAKE),y) -NHLT_BLOB_PATH = 3rdparty/blobs/soc/intel/kabylake/nhlt-blobs -else -NHLT_BLOB_PATH = 3rdparty/blobs/soc/intel/skylake/nhlt-blobs -endif - -DMIC_1CH_48KHZ_16B = dmic-1ch-48khz-16b.bin -DMIC_2CH_48KHZ_16B = dmic-2ch-48khz-16b.bin -DMIC_2CH_48KHZ_32B = dmic-2ch-48khz-32b.bin -DMIC_4CH_48KHZ_16B = dmic-4ch-48khz-16b.bin -DMIC_4CH_48KHZ_32B = dmic-4ch-48khz-32b.bin -NAU88L25 = nau88l25-2ch-48khz-24b.bin -MAX98357_RENDER = max98357-render-2ch-48khz-24b.bin -MAX98373_RENDER_16B = max98373-render-2ch-48khz-16b.bin -MAX98373_RENDER_24B = max98373-render-2ch-48khz-24b.bin -MAX98927_RENDER_24B = max98927-render-2ch-48khz-24b.bin -MAX98927_RENDER_16B = max98927-render-2ch-48khz-16b.bin -RT5514_CAPTURE = rt5514-capture-4ch-48khz-16b.bin -RT5663 = rt5663-2ch-48khz-24b.bin -SSM4567_RENDER = ssm4567-render-2ch-48khz-24b.bin -SSM4567_CAPTURE = ssm4567-capture-4ch-48khz-32b.bin -DA7219_RENDER_CAPTURE = dialog-2ch-48khz-24b.bin - -cbfs-files-$(CONFIG_NHLT_DMIC_1CH) += $(DMIC_1CH_48KHZ_16B) -$(DMIC_1CH_48KHZ_16B)-file := $(NHLT_BLOB_PATH)/$(DMIC_1CH_48KHZ_16B) -$(DMIC_1CH_48KHZ_16B)-type := raw - -cbfs-files-$(CONFIG_NHLT_DMIC_2CH) += $(DMIC_2CH_48KHZ_16B) -$(DMIC_2CH_48KHZ_16B)-file := $(NHLT_BLOB_PATH)/$(DMIC_2CH_48KHZ_16B) -$(DMIC_2CH_48KHZ_16B)-type := raw - -cbfs-files-$(CONFIG_NHLT_DMIC_2CH) += $(DMIC_2CH_48KHZ_32B) -$(DMIC_2CH_48KHZ_32B)-file := $(NHLT_BLOB_PATH)/$(DMIC_2CH_48KHZ_32B) -$(DMIC_2CH_48KHZ_32B)-type := raw - -cbfs-files-$(CONFIG_NHLT_DMIC_4CH) += $(DMIC_4CH_48KHZ_16B) -$(DMIC_4CH_48KHZ_16B)-file := $(NHLT_BLOB_PATH)/$(DMIC_4CH_48KHZ_16B) -$(DMIC_4CH_48KHZ_16B)-type := raw - -cbfs-files-$(CONFIG_NHLT_DMIC_4CH) += $(DMIC_4CH_48KHZ_32B) -$(DMIC_4CH_48KHZ_32B)-file := $(NHLT_BLOB_PATH)/$(DMIC_4CH_48KHZ_32B) -$(DMIC_4CH_48KHZ_32B)-type := raw - -cbfs-files-$(CONFIG_NHLT_NAU88L25) += $(NAU88L25) -$(NAU88L25)-file := $(NHLT_BLOB_PATH)/$(NAU88L25) -$(NAU88L25)-type := raw - -cbfs-files-$(CONFIG_NHLT_MAX98357) += $(MAX98357_RENDER) -$(MAX98357_RENDER)-file := $(NHLT_BLOB_PATH)/$(MAX98357_RENDER) -$(MAX98357_RENDER)-type := raw - -cbfs-files-$(CONFIG_NHLT_MAX98373) += $(MAX98373_RENDER_16B) -$(MAX98373_RENDER_16B)-file := $(NHLT_BLOB_PATH)/$(MAX98373_RENDER_16B) -$(MAX98373_RENDER_16B)-type := raw - -cbfs-files-$(CONFIG_NHLT_MAX98373) += $(MAX98373_RENDER_24B) -$(MAX98373_RENDER_24B)-file := $(NHLT_BLOB_PATH)/$(MAX98373_RENDER_24B) -$(MAX98373_RENDER_24B)-type := raw - -cbfs-files-$(CONFIG_NHLT_SSM4567) += $(SSM4567_RENDER) -$(SSM4567_RENDER)-file := $(NHLT_BLOB_PATH)/$(SSM4567_RENDER) -$(SSM4567_RENDER)-type := raw - -cbfs-files-$(CONFIG_NHLT_SSM4567) += $(SSM4567_CAPTURE) -$(SSM4567_CAPTURE)-file := $(NHLT_BLOB_PATH)/$(SSM4567_CAPTURE) -$(SSM4567_CAPTURE)-type := raw - -cbfs-files-$(CONFIG_NHLT_RT5514) += $(RT5514_CAPTURE) -$(RT5514_CAPTURE)-file := $(NHLT_BLOB_PATH)/$(RT5514_CAPTURE) -$(RT5514_CAPTURE)-type := raw - -cbfs-files-$(CONFIG_NHLT_RT5663) += $(RT5663) -$(RT5663)-file := $(NHLT_BLOB_PATH)/$(RT5663) -$(RT5663)-type := raw - -cbfs-files-$(CONFIG_NHLT_MAX98927) += $(MAX98927_RENDER_16B) -$(MAX98927_RENDER_16B)-file := $(NHLT_BLOB_PATH)/$(MAX98927_RENDER_16B) -$(MAX98927_RENDER_16B)-type := raw - -cbfs-files-$(CONFIG_NHLT_MAX98927) += $(MAX98927_RENDER_24B) -$(MAX98927_RENDER_24B)-file := $(NHLT_BLOB_PATH)/$(MAX98927_RENDER_24B) -$(MAX98927_RENDER_24B)-type := raw - -cbfs-files-$(CONFIG_NHLT_DA7219) += $(DA7219_RENDER_CAPTURE) -$(DA7219_RENDER_CAPTURE)-file := $(NHLT_BLOB_PATH)/$(DA7219_RENDER_CAPTURE) -$(DA7219_RENDER_CAPTURE)-type := raw diff --git a/src/soc/intel/skylake/nhlt/Makefile.mk b/src/soc/intel/skylake/nhlt/Makefile.mk new file mode 100644 index 0000000000..dda9662014 --- /dev/null +++ b/src/soc/intel/skylake/nhlt/Makefile.mk @@ -0,0 +1,98 @@ +## SPDX-License-Identifier: GPL-2.0-only +ramstage-y += dmic.c +ramstage-y += nau88l25.c +ramstage-y += max98357.c +ramstage-y += max98373.c +ramstage-y += ssm4567.c +ramstage-y += rt5514.c +ramstage-y += rt5663.c +ramstage-y += max98927.c +ramstage-y += da7219.c + +# DSP firmware settings files. +ifeq ($(CONFIG_SOC_INTEL_KABYLAKE),y) +NHLT_BLOB_PATH = 3rdparty/blobs/soc/intel/kabylake/nhlt-blobs +else +NHLT_BLOB_PATH = 3rdparty/blobs/soc/intel/skylake/nhlt-blobs +endif + +DMIC_1CH_48KHZ_16B = dmic-1ch-48khz-16b.bin +DMIC_2CH_48KHZ_16B = dmic-2ch-48khz-16b.bin +DMIC_2CH_48KHZ_32B = dmic-2ch-48khz-32b.bin +DMIC_4CH_48KHZ_16B = dmic-4ch-48khz-16b.bin +DMIC_4CH_48KHZ_32B = dmic-4ch-48khz-32b.bin +NAU88L25 = nau88l25-2ch-48khz-24b.bin +MAX98357_RENDER = max98357-render-2ch-48khz-24b.bin +MAX98373_RENDER_16B = max98373-render-2ch-48khz-16b.bin +MAX98373_RENDER_24B = max98373-render-2ch-48khz-24b.bin +MAX98927_RENDER_24B = max98927-render-2ch-48khz-24b.bin +MAX98927_RENDER_16B = max98927-render-2ch-48khz-16b.bin +RT5514_CAPTURE = rt5514-capture-4ch-48khz-16b.bin +RT5663 = rt5663-2ch-48khz-24b.bin +SSM4567_RENDER = ssm4567-render-2ch-48khz-24b.bin +SSM4567_CAPTURE = ssm4567-capture-4ch-48khz-32b.bin +DA7219_RENDER_CAPTURE = dialog-2ch-48khz-24b.bin + +cbfs-files-$(CONFIG_NHLT_DMIC_1CH) += $(DMIC_1CH_48KHZ_16B) +$(DMIC_1CH_48KHZ_16B)-file := $(NHLT_BLOB_PATH)/$(DMIC_1CH_48KHZ_16B) +$(DMIC_1CH_48KHZ_16B)-type := raw + +cbfs-files-$(CONFIG_NHLT_DMIC_2CH) += $(DMIC_2CH_48KHZ_16B) +$(DMIC_2CH_48KHZ_16B)-file := $(NHLT_BLOB_PATH)/$(DMIC_2CH_48KHZ_16B) +$(DMIC_2CH_48KHZ_16B)-type := raw + +cbfs-files-$(CONFIG_NHLT_DMIC_2CH) += $(DMIC_2CH_48KHZ_32B) +$(DMIC_2CH_48KHZ_32B)-file := $(NHLT_BLOB_PATH)/$(DMIC_2CH_48KHZ_32B) +$(DMIC_2CH_48KHZ_32B)-type := raw + +cbfs-files-$(CONFIG_NHLT_DMIC_4CH) += $(DMIC_4CH_48KHZ_16B) +$(DMIC_4CH_48KHZ_16B)-file := $(NHLT_BLOB_PATH)/$(DMIC_4CH_48KHZ_16B) +$(DMIC_4CH_48KHZ_16B)-type := raw + +cbfs-files-$(CONFIG_NHLT_DMIC_4CH) += $(DMIC_4CH_48KHZ_32B) +$(DMIC_4CH_48KHZ_32B)-file := $(NHLT_BLOB_PATH)/$(DMIC_4CH_48KHZ_32B) +$(DMIC_4CH_48KHZ_32B)-type := raw + +cbfs-files-$(CONFIG_NHLT_NAU88L25) += $(NAU88L25) +$(NAU88L25)-file := $(NHLT_BLOB_PATH)/$(NAU88L25) +$(NAU88L25)-type := raw + +cbfs-files-$(CONFIG_NHLT_MAX98357) += $(MAX98357_RENDER) +$(MAX98357_RENDER)-file := $(NHLT_BLOB_PATH)/$(MAX98357_RENDER) +$(MAX98357_RENDER)-type := raw + +cbfs-files-$(CONFIG_NHLT_MAX98373) += $(MAX98373_RENDER_16B) +$(MAX98373_RENDER_16B)-file := $(NHLT_BLOB_PATH)/$(MAX98373_RENDER_16B) +$(MAX98373_RENDER_16B)-type := raw + +cbfs-files-$(CONFIG_NHLT_MAX98373) += $(MAX98373_RENDER_24B) +$(MAX98373_RENDER_24B)-file := $(NHLT_BLOB_PATH)/$(MAX98373_RENDER_24B) +$(MAX98373_RENDER_24B)-type := raw + +cbfs-files-$(CONFIG_NHLT_SSM4567) += $(SSM4567_RENDER) +$(SSM4567_RENDER)-file := $(NHLT_BLOB_PATH)/$(SSM4567_RENDER) +$(SSM4567_RENDER)-type := raw + +cbfs-files-$(CONFIG_NHLT_SSM4567) += $(SSM4567_CAPTURE) +$(SSM4567_CAPTURE)-file := $(NHLT_BLOB_PATH)/$(SSM4567_CAPTURE) +$(SSM4567_CAPTURE)-type := raw + +cbfs-files-$(CONFIG_NHLT_RT5514) += $(RT5514_CAPTURE) +$(RT5514_CAPTURE)-file := $(NHLT_BLOB_PATH)/$(RT5514_CAPTURE) +$(RT5514_CAPTURE)-type := raw + +cbfs-files-$(CONFIG_NHLT_RT5663) += $(RT5663) +$(RT5663)-file := $(NHLT_BLOB_PATH)/$(RT5663) +$(RT5663)-type := raw + +cbfs-files-$(CONFIG_NHLT_MAX98927) += $(MAX98927_RENDER_16B) +$(MAX98927_RENDER_16B)-file := $(NHLT_BLOB_PATH)/$(MAX98927_RENDER_16B) +$(MAX98927_RENDER_16B)-type := raw + +cbfs-files-$(CONFIG_NHLT_MAX98927) += $(MAX98927_RENDER_24B) +$(MAX98927_RENDER_24B)-file := $(NHLT_BLOB_PATH)/$(MAX98927_RENDER_24B) +$(MAX98927_RENDER_24B)-type := raw + +cbfs-files-$(CONFIG_NHLT_DA7219) += $(DA7219_RENDER_CAPTURE) +$(DA7219_RENDER_CAPTURE)-file := $(NHLT_BLOB_PATH)/$(DA7219_RENDER_CAPTURE) +$(DA7219_RENDER_CAPTURE)-type := raw diff --git a/src/soc/intel/skylake/romstage/Makefile.inc b/src/soc/intel/skylake/romstage/Makefile.inc deleted file mode 100644 index 3e665b36fa..0000000000 --- a/src/soc/intel/skylake/romstage/Makefile.inc +++ /dev/null @@ -1,5 +0,0 @@ -## SPDX-License-Identifier: GPL-2.0-only -romstage-y += fsp_params.c -romstage-y += ../../../../cpu/intel/car/romstage.c -romstage-y += romstage.c -romstage-y += systemagent.c diff --git a/src/soc/intel/skylake/romstage/Makefile.mk b/src/soc/intel/skylake/romstage/Makefile.mk new file mode 100644 index 0000000000..3e665b36fa --- /dev/null +++ b/src/soc/intel/skylake/romstage/Makefile.mk @@ -0,0 +1,5 @@ +## SPDX-License-Identifier: GPL-2.0-only +romstage-y += fsp_params.c +romstage-y += ../../../../cpu/intel/car/romstage.c +romstage-y += romstage.c +romstage-y += systemagent.c diff --git a/src/soc/intel/tigerlake/Makefile.inc b/src/soc/intel/tigerlake/Makefile.inc deleted file mode 100644 index 435572e10a..0000000000 --- a/src/soc/intel/tigerlake/Makefile.inc +++ /dev/null @@ -1,77 +0,0 @@ -## SPDX-License-Identifier: GPL-2.0-only -ifeq ($(CONFIG_SOC_INTEL_TIGERLAKE),y) - -subdirs-y += romstage -subdirs-y += ../../../cpu/intel/microcode -subdirs-y += ../../../cpu/intel/turbo - -# all (bootblock, verstage, romstage, postcar, ramstage) -all-y += gspi.c -all-y += i2c.c -all-y += pmutil.c -all-y += spi.c -all-y += uart.c - -bootblock-y += bootblock/bootblock.c -bootblock-y += bootblock/pch.c -bootblock-y += bootblock/report_platform.c -bootblock-y += espi.c -bootblock-y += p2sb.c - -romstage-y += espi.c -romstage-y += meminit.c -romstage-y += reset.c - -ramstage-y += acpi.c -ramstage-y += chip.c -ramstage-y += cpu.c -ramstage-y += elog.c -ramstage-y += espi.c -ramstage-y += finalize.c -ramstage-y += fsp_params.c -ramstage-y += graphics.c -ramstage-y += lockdown.c -ramstage-y += lpm.c -ramstage-y += p2sb.c -ramstage-y += pcie_rp.c -ramstage-y += pmc.c -ramstage-y += reset.c -ramstage-y += retimer.c -ramstage-y += soundwire.c -ramstage-y += systemagent.c -ramstage-y += tcss.c -ramstage-y += xhci.c -ramstage-$(CONFIG_SOC_INTEL_CRASHLOG) += crashlog_lib.c - -smm-y += p2sb.c -smm-y += pmutil.c -smm-y += smihandler.c -smm-y += uart.c -smm-y += elog.c -smm-y += xhci.c - -ifeq ($(CONFIG_SOC_INTEL_TIGERLAKE_PCH_H),y) -bootblock-y += gpio_pch_h.c -romstage-y += gpio_pch_h.c -ramstage-y += gpio_pch_h.c -smm-y += gpio_pch_h.c -verstage-y += gpio_pch_h.c -else -bootblock-y += gpio.c -romstage-y += gpio.c -ramstage-y += gpio.c -smm-y += gpio.c -verstage-y += gpio.c -endif - -CPPFLAGS_common += -I$(src)/soc/intel/tigerlake -CPPFLAGS_common += -I$(src)/soc/intel/tigerlake/include - -ifeq ($(CONFIG_SOC_INTEL_TIGERLAKE_PCH_H),y) -cpu_microcode_bins += 3rdparty/intel-microcode/intel-ucode/06-8d-01 -else -cpu_microcode_bins += 3rdparty/intel-microcode/intel-ucode/06-8c-01 -cpu_microcode_bins += 3rdparty/intel-microcode/intel-ucode/06-8c-02 -endif - -endif diff --git a/src/soc/intel/tigerlake/Makefile.mk b/src/soc/intel/tigerlake/Makefile.mk new file mode 100644 index 0000000000..435572e10a --- /dev/null +++ b/src/soc/intel/tigerlake/Makefile.mk @@ -0,0 +1,77 @@ +## SPDX-License-Identifier: GPL-2.0-only +ifeq ($(CONFIG_SOC_INTEL_TIGERLAKE),y) + +subdirs-y += romstage +subdirs-y += ../../../cpu/intel/microcode +subdirs-y += ../../../cpu/intel/turbo + +# all (bootblock, verstage, romstage, postcar, ramstage) +all-y += gspi.c +all-y += i2c.c +all-y += pmutil.c +all-y += spi.c +all-y += uart.c + +bootblock-y += bootblock/bootblock.c +bootblock-y += bootblock/pch.c +bootblock-y += bootblock/report_platform.c +bootblock-y += espi.c +bootblock-y += p2sb.c + +romstage-y += espi.c +romstage-y += meminit.c +romstage-y += reset.c + +ramstage-y += acpi.c +ramstage-y += chip.c +ramstage-y += cpu.c +ramstage-y += elog.c +ramstage-y += espi.c +ramstage-y += finalize.c +ramstage-y += fsp_params.c +ramstage-y += graphics.c +ramstage-y += lockdown.c +ramstage-y += lpm.c +ramstage-y += p2sb.c +ramstage-y += pcie_rp.c +ramstage-y += pmc.c +ramstage-y += reset.c +ramstage-y += retimer.c +ramstage-y += soundwire.c +ramstage-y += systemagent.c +ramstage-y += tcss.c +ramstage-y += xhci.c +ramstage-$(CONFIG_SOC_INTEL_CRASHLOG) += crashlog_lib.c + +smm-y += p2sb.c +smm-y += pmutil.c +smm-y += smihandler.c +smm-y += uart.c +smm-y += elog.c +smm-y += xhci.c + +ifeq ($(CONFIG_SOC_INTEL_TIGERLAKE_PCH_H),y) +bootblock-y += gpio_pch_h.c +romstage-y += gpio_pch_h.c +ramstage-y += gpio_pch_h.c +smm-y += gpio_pch_h.c +verstage-y += gpio_pch_h.c +else +bootblock-y += gpio.c +romstage-y += gpio.c +ramstage-y += gpio.c +smm-y += gpio.c +verstage-y += gpio.c +endif + +CPPFLAGS_common += -I$(src)/soc/intel/tigerlake +CPPFLAGS_common += -I$(src)/soc/intel/tigerlake/include + +ifeq ($(CONFIG_SOC_INTEL_TIGERLAKE_PCH_H),y) +cpu_microcode_bins += 3rdparty/intel-microcode/intel-ucode/06-8d-01 +else +cpu_microcode_bins += 3rdparty/intel-microcode/intel-ucode/06-8c-01 +cpu_microcode_bins += 3rdparty/intel-microcode/intel-ucode/06-8c-02 +endif + +endif diff --git a/src/soc/intel/tigerlake/romstage/Makefile.inc b/src/soc/intel/tigerlake/romstage/Makefile.inc deleted file mode 100644 index 99c1d2ca25..0000000000 --- a/src/soc/intel/tigerlake/romstage/Makefile.inc +++ /dev/null @@ -1,6 +0,0 @@ -# SPDX-License-Identifier: GPL-2.0-only - -romstage-y += fsp_params.c -romstage-y += ../../../../cpu/intel/car/romstage.c -romstage-y += romstage.c -romstage-y += systemagent.c diff --git a/src/soc/intel/tigerlake/romstage/Makefile.mk b/src/soc/intel/tigerlake/romstage/Makefile.mk new file mode 100644 index 0000000000..99c1d2ca25 --- /dev/null +++ b/src/soc/intel/tigerlake/romstage/Makefile.mk @@ -0,0 +1,6 @@ +# SPDX-License-Identifier: GPL-2.0-only + +romstage-y += fsp_params.c +romstage-y += ../../../../cpu/intel/car/romstage.c +romstage-y += romstage.c +romstage-y += systemagent.c diff --git a/src/soc/intel/xeon_sp/Makefile.inc b/src/soc/intel/xeon_sp/Makefile.inc deleted file mode 100644 index a732c78b53..0000000000 --- a/src/soc/intel/xeon_sp/Makefile.inc +++ /dev/null @@ -1,26 +0,0 @@ -## SPDX-License-Identifier: GPL-2.0-or-later - -ifeq ($(CONFIG_XEON_SP_COMMON_BASE),y) - -subdirs-$(CONFIG_SOC_INTEL_SKYLAKE_SP) += skx lbg -subdirs-$(CONFIG_SOC_INTEL_COOPERLAKE_SP) += cpx lbg -subdirs-$(CONFIG_SOC_INTEL_SAPPHIRERAPIDS_SP) += spr ebg - -bootblock-y += bootblock.c spi.c lpc.c pch.c report_platform.c -romstage-y += romstage.c reset.c util.c spi.c pmutil.c memmap.c -romstage-y += ../../../cpu/intel/car/romstage.c -ramstage-y += uncore.c reset.c util.c lpc.c spi.c ramstage.c chip_common.c -ramstage-y += memmap.c pch.c lockdown.c finalize.c -ramstage-$(CONFIG_SOC_INTEL_COMMON_BLOCK_PMC) += pmc.c pmutil.c -ramstage-$(CONFIG_HAVE_ACPI_TABLES) += uncore_acpi.c acpi.c -ramstage-$(CONFIG_SOC_INTEL_HAS_CXL) += uncore_acpi_cxl.c -ramstage-$(CONFIG_HAVE_SMI_HANDLER) += smmrelocate.c -smm-y += smihandler.c pmutil.c -postcar-y += spi.c - -subdirs-$(CONFIG_SOC_INTEL_XEON_RAS) += ras - -CPPFLAGS_common += -I$(src)/soc/intel/xeon_sp/include -CPPFLAGS_common += -include $(src)/soc/intel/xeon_sp/include/soc/fsp_upd.h - -endif ## XEON_SP_COMMON_BASE diff --git a/src/soc/intel/xeon_sp/Makefile.mk b/src/soc/intel/xeon_sp/Makefile.mk new file mode 100644 index 0000000000..a732c78b53 --- /dev/null +++ b/src/soc/intel/xeon_sp/Makefile.mk @@ -0,0 +1,26 @@ +## SPDX-License-Identifier: GPL-2.0-or-later + +ifeq ($(CONFIG_XEON_SP_COMMON_BASE),y) + +subdirs-$(CONFIG_SOC_INTEL_SKYLAKE_SP) += skx lbg +subdirs-$(CONFIG_SOC_INTEL_COOPERLAKE_SP) += cpx lbg +subdirs-$(CONFIG_SOC_INTEL_SAPPHIRERAPIDS_SP) += spr ebg + +bootblock-y += bootblock.c spi.c lpc.c pch.c report_platform.c +romstage-y += romstage.c reset.c util.c spi.c pmutil.c memmap.c +romstage-y += ../../../cpu/intel/car/romstage.c +ramstage-y += uncore.c reset.c util.c lpc.c spi.c ramstage.c chip_common.c +ramstage-y += memmap.c pch.c lockdown.c finalize.c +ramstage-$(CONFIG_SOC_INTEL_COMMON_BLOCK_PMC) += pmc.c pmutil.c +ramstage-$(CONFIG_HAVE_ACPI_TABLES) += uncore_acpi.c acpi.c +ramstage-$(CONFIG_SOC_INTEL_HAS_CXL) += uncore_acpi_cxl.c +ramstage-$(CONFIG_HAVE_SMI_HANDLER) += smmrelocate.c +smm-y += smihandler.c pmutil.c +postcar-y += spi.c + +subdirs-$(CONFIG_SOC_INTEL_XEON_RAS) += ras + +CPPFLAGS_common += -I$(src)/soc/intel/xeon_sp/include +CPPFLAGS_common += -include $(src)/soc/intel/xeon_sp/include/soc/fsp_upd.h + +endif ## XEON_SP_COMMON_BASE diff --git a/src/soc/intel/xeon_sp/cpx/Makefile.inc b/src/soc/intel/xeon_sp/cpx/Makefile.inc deleted file mode 100644 index 745e032137..0000000000 --- a/src/soc/intel/xeon_sp/cpx/Makefile.inc +++ /dev/null @@ -1,22 +0,0 @@ -## SPDX-License-Identifier: GPL-2.0-only - -ifeq ($(CONFIG_SOC_INTEL_COOPERLAKE_SP),y) - -subdirs-y += ../../../../cpu/intel/turbo -subdirs-y += ../../../../cpu/intel/microcode - -romstage-y += romstage.c ddr.c soc_util.c -romstage-$(CONFIG_DISPLAY_UPD_DATA) += upd_display.c -romstage-$(CONFIG_DISPLAY_HOBS) += hob_display.c - -ramstage-y += chip.c cpu.c soc_util.c soc_acpi.c -ramstage-$(CONFIG_DISPLAY_HOBS) += hob_display.c -ramstage-$(CONFIG_DISPLAY_UPD_DATA) += upd_display.c -smm-$(CONFIG_HAVE_SMI_HANDLER) += soc_smihandler_util.c - -CPPFLAGS_common += -I$(src)/soc/intel/xeon_sp/cpx/include -I$(src)/soc/intel/xeon_sp/cpx -CPPFLAGS_common += -I$(src)/vendorcode/intel/fsp/fsp2_0/cooperlake_sp - -cpu_microcode_bins += 3rdparty/intel-microcode/intel-ucode/06-55-0b - -endif ## CONFIG_SOC_INTEL_COOPERLAKE_SP diff --git a/src/soc/intel/xeon_sp/cpx/Makefile.mk b/src/soc/intel/xeon_sp/cpx/Makefile.mk new file mode 100644 index 0000000000..745e032137 --- /dev/null +++ b/src/soc/intel/xeon_sp/cpx/Makefile.mk @@ -0,0 +1,22 @@ +## SPDX-License-Identifier: GPL-2.0-only + +ifeq ($(CONFIG_SOC_INTEL_COOPERLAKE_SP),y) + +subdirs-y += ../../../../cpu/intel/turbo +subdirs-y += ../../../../cpu/intel/microcode + +romstage-y += romstage.c ddr.c soc_util.c +romstage-$(CONFIG_DISPLAY_UPD_DATA) += upd_display.c +romstage-$(CONFIG_DISPLAY_HOBS) += hob_display.c + +ramstage-y += chip.c cpu.c soc_util.c soc_acpi.c +ramstage-$(CONFIG_DISPLAY_HOBS) += hob_display.c +ramstage-$(CONFIG_DISPLAY_UPD_DATA) += upd_display.c +smm-$(CONFIG_HAVE_SMI_HANDLER) += soc_smihandler_util.c + +CPPFLAGS_common += -I$(src)/soc/intel/xeon_sp/cpx/include -I$(src)/soc/intel/xeon_sp/cpx +CPPFLAGS_common += -I$(src)/vendorcode/intel/fsp/fsp2_0/cooperlake_sp + +cpu_microcode_bins += 3rdparty/intel-microcode/intel-ucode/06-55-0b + +endif ## CONFIG_SOC_INTEL_COOPERLAKE_SP diff --git a/src/soc/intel/xeon_sp/ebg/Makefile.inc b/src/soc/intel/xeon_sp/ebg/Makefile.inc deleted file mode 100644 index ac73acbde9..0000000000 --- a/src/soc/intel/xeon_sp/ebg/Makefile.inc +++ /dev/null @@ -1,7 +0,0 @@ -## SPDX-License-Identifier: GPL-2.0-only - -bootblock-y += soc_gpio.c soc_pch.c -romstage-y += soc_gpio.c soc_pmutil.c soc_pch.c -ramstage-y += lockdown.c soc_gpio.c soc_pch.c soc_pmutil.c - -CPPFLAGS_common += -I$(src)/soc/intel/xeon_sp/ebg/include diff --git a/src/soc/intel/xeon_sp/ebg/Makefile.mk b/src/soc/intel/xeon_sp/ebg/Makefile.mk new file mode 100644 index 0000000000..ac73acbde9 --- /dev/null +++ b/src/soc/intel/xeon_sp/ebg/Makefile.mk @@ -0,0 +1,7 @@ +## SPDX-License-Identifier: GPL-2.0-only + +bootblock-y += soc_gpio.c soc_pch.c +romstage-y += soc_gpio.c soc_pmutil.c soc_pch.c +ramstage-y += lockdown.c soc_gpio.c soc_pch.c soc_pmutil.c + +CPPFLAGS_common += -I$(src)/soc/intel/xeon_sp/ebg/include diff --git a/src/soc/intel/xeon_sp/lbg/Makefile.inc b/src/soc/intel/xeon_sp/lbg/Makefile.inc deleted file mode 100644 index 5dedc8368f..0000000000 --- a/src/soc/intel/xeon_sp/lbg/Makefile.inc +++ /dev/null @@ -1,7 +0,0 @@ -## SPDX-License-Identifier: GPL-2.0-only - -bootblock-y += soc_pch.c soc_gpio.c -romstage-y += soc_pmutil.c soc_gpio.c -ramstage-y += soc_pmutil.c soc_pch.c soc_gpio.c lockdown.c - -CPPFLAGS_common += -I$(src)/soc/intel/xeon_sp/lbg/include diff --git a/src/soc/intel/xeon_sp/lbg/Makefile.mk b/src/soc/intel/xeon_sp/lbg/Makefile.mk new file mode 100644 index 0000000000..5dedc8368f --- /dev/null +++ b/src/soc/intel/xeon_sp/lbg/Makefile.mk @@ -0,0 +1,7 @@ +## SPDX-License-Identifier: GPL-2.0-only + +bootblock-y += soc_pch.c soc_gpio.c +romstage-y += soc_pmutil.c soc_gpio.c +ramstage-y += soc_pmutil.c soc_pch.c soc_gpio.c lockdown.c + +CPPFLAGS_common += -I$(src)/soc/intel/xeon_sp/lbg/include diff --git a/src/soc/intel/xeon_sp/ras/Makefile.inc b/src/soc/intel/xeon_sp/ras/Makefile.inc deleted file mode 100644 index 93c8705f94..0000000000 --- a/src/soc/intel/xeon_sp/ras/Makefile.inc +++ /dev/null @@ -1,3 +0,0 @@ -## SPDX-License-Identifier: GPL-2.0-or-later - -ramstage-$(CONFIG_SOC_ACPI_HEST) += hest.c diff --git a/src/soc/intel/xeon_sp/ras/Makefile.mk b/src/soc/intel/xeon_sp/ras/Makefile.mk new file mode 100644 index 0000000000..93c8705f94 --- /dev/null +++ b/src/soc/intel/xeon_sp/ras/Makefile.mk @@ -0,0 +1,3 @@ +## SPDX-License-Identifier: GPL-2.0-or-later + +ramstage-$(CONFIG_SOC_ACPI_HEST) += hest.c diff --git a/src/soc/intel/xeon_sp/skx/Makefile.inc b/src/soc/intel/xeon_sp/skx/Makefile.inc deleted file mode 100644 index 0f75eec864..0000000000 --- a/src/soc/intel/xeon_sp/skx/Makefile.inc +++ /dev/null @@ -1,30 +0,0 @@ -## SPDX-License-Identifier: GPL-2.0-only - -ifeq ($(CONFIG_SOC_INTEL_SKYLAKE_SP),y) - -subdirs-y += ../../../../cpu/intel/microcode -subdirs-y += ../../../../cpu/intel/turbo - -postcar-y += soc_util.c - -romstage-y += soc_util.c -romstage-y += romstage.c -romstage-y += soc_util.c -romstage-y += hob_display.c -romstage-$(CONFIG_DISPLAY_UPD_DATA) += upd_display.c -romstage-$(CONFIG_DISPLAY_HOBS) += hob_display.c - -ramstage-y += soc_acpi.c -ramstage-y += chip.c -ramstage-y += soc_util.c -ramstage-y += cpu.c -ramstage-$(CONFIG_DISPLAY_UPD_DATA) += upd_display.c -ramstage-$(CONFIG_DISPLAY_HOBS) += hob_display.c -ramstage-y += hob_display.c -smm-$(CONFIG_HAVE_SMI_HANDLER) += soc_smihandler_util.c - -CPPFLAGS_common += -I$(src)/soc/intel/xeon_sp/skx/include -I$(src)/soc/intel/xeon_sp/skx - -cpu_microcode_bins += 3rdparty/intel-microcode/intel-ucode/06-55-04 - -endif ## CONFIG_SOC_INTEL_SKYLAKE_SP diff --git a/src/soc/intel/xeon_sp/skx/Makefile.mk b/src/soc/intel/xeon_sp/skx/Makefile.mk new file mode 100644 index 0000000000..0f75eec864 --- /dev/null +++ b/src/soc/intel/xeon_sp/skx/Makefile.mk @@ -0,0 +1,30 @@ +## SPDX-License-Identifier: GPL-2.0-only + +ifeq ($(CONFIG_SOC_INTEL_SKYLAKE_SP),y) + +subdirs-y += ../../../../cpu/intel/microcode +subdirs-y += ../../../../cpu/intel/turbo + +postcar-y += soc_util.c + +romstage-y += soc_util.c +romstage-y += romstage.c +romstage-y += soc_util.c +romstage-y += hob_display.c +romstage-$(CONFIG_DISPLAY_UPD_DATA) += upd_display.c +romstage-$(CONFIG_DISPLAY_HOBS) += hob_display.c + +ramstage-y += soc_acpi.c +ramstage-y += chip.c +ramstage-y += soc_util.c +ramstage-y += cpu.c +ramstage-$(CONFIG_DISPLAY_UPD_DATA) += upd_display.c +ramstage-$(CONFIG_DISPLAY_HOBS) += hob_display.c +ramstage-y += hob_display.c +smm-$(CONFIG_HAVE_SMI_HANDLER) += soc_smihandler_util.c + +CPPFLAGS_common += -I$(src)/soc/intel/xeon_sp/skx/include -I$(src)/soc/intel/xeon_sp/skx + +cpu_microcode_bins += 3rdparty/intel-microcode/intel-ucode/06-55-04 + +endif ## CONFIG_SOC_INTEL_SKYLAKE_SP diff --git a/src/soc/intel/xeon_sp/spr/Makefile.inc b/src/soc/intel/xeon_sp/spr/Makefile.inc deleted file mode 100644 index 7a0d9586c5..0000000000 --- a/src/soc/intel/xeon_sp/spr/Makefile.inc +++ /dev/null @@ -1,22 +0,0 @@ -## SPDX-License-Identifier: GPL-2.0-only - -ifeq ($(CONFIG_SOC_INTEL_SAPPHIRERAPIDS_SP),y) - -subdirs-y += ../../../../cpu/intel/turbo -subdirs-y += ../../../../cpu/x86/lapic -subdirs-y += ../../../../cpu/x86/mtrr -subdirs-y += ../../../../cpu/x86/tsc -subdirs-y += ../../../../cpu/intel/microcode - -romstage-y += romstage.c soc_util.c ddr.c -romstage-$(CONFIG_DISPLAY_HOBS) += hob_display.c -romstage-$(CONFIG_DISPLAY_UPD_DATA) += upd_display.c - -ramstage-y += chip.c cpu.c soc_util.c ramstage.c soc_acpi.c xhci.c numa.c reset.c -ramstage-y += crashlog.c ioat.c -ramstage-$(CONFIG_DISPLAY_HOBS) += hob_display.c -ramstage-$(CONFIG_DISPLAY_UPD_DATA) += upd_display.c -smm-$(CONFIG_HAVE_SMI_HANDLER) += soc_smihandler_util.c -CPPFLAGS_common += -I$(src)/soc/intel/xeon_sp/spr/include -I$(src)/soc/intel/xeon_sp/spr - -endif ## CONFIG_SOC_INTEL_SAPPHIRERAPIDS_SP diff --git a/src/soc/intel/xeon_sp/spr/Makefile.mk b/src/soc/intel/xeon_sp/spr/Makefile.mk new file mode 100644 index 0000000000..7a0d9586c5 --- /dev/null +++ b/src/soc/intel/xeon_sp/spr/Makefile.mk @@ -0,0 +1,22 @@ +## SPDX-License-Identifier: GPL-2.0-only + +ifeq ($(CONFIG_SOC_INTEL_SAPPHIRERAPIDS_SP),y) + +subdirs-y += ../../../../cpu/intel/turbo +subdirs-y += ../../../../cpu/x86/lapic +subdirs-y += ../../../../cpu/x86/mtrr +subdirs-y += ../../../../cpu/x86/tsc +subdirs-y += ../../../../cpu/intel/microcode + +romstage-y += romstage.c soc_util.c ddr.c +romstage-$(CONFIG_DISPLAY_HOBS) += hob_display.c +romstage-$(CONFIG_DISPLAY_UPD_DATA) += upd_display.c + +ramstage-y += chip.c cpu.c soc_util.c ramstage.c soc_acpi.c xhci.c numa.c reset.c +ramstage-y += crashlog.c ioat.c +ramstage-$(CONFIG_DISPLAY_HOBS) += hob_display.c +ramstage-$(CONFIG_DISPLAY_UPD_DATA) += upd_display.c +smm-$(CONFIG_HAVE_SMI_HANDLER) += soc_smihandler_util.c +CPPFLAGS_common += -I$(src)/soc/intel/xeon_sp/spr/include -I$(src)/soc/intel/xeon_sp/spr + +endif ## CONFIG_SOC_INTEL_SAPPHIRERAPIDS_SP -- cgit v1.2.3