From d37a419a7dc600badf523e50edc854c962d7f504 Mon Sep 17 00:00:00 2001 From: Sumeet Pawnikar Date: Thu, 29 Jul 2021 22:09:14 +0530 Subject: soc/intel/adl: Update power limits for ADL-M SKU Update SKU specific power limits for ADL-M as per document 643775. BUG=None BRANCH=None Change-Id: I40b9b3a508c549d940e1c2c9e8b4079695b694e6 Signed-off-by: Sumeet Pawnikar Reviewed-on: https://review.coreboot.org/c/coreboot/+/56976 Tested-by: build bot (Jenkins) Reviewed-by: Tim Wawrzynczak --- src/soc/intel/alderlake/chip.h | 1 + src/soc/intel/alderlake/chipset.cb | 6 ++++++ src/soc/intel/alderlake/systemagent.c | 3 +++ 3 files changed, 10 insertions(+) (limited to 'src/soc/intel') diff --git a/src/soc/intel/alderlake/chip.h b/src/soc/intel/alderlake/chip.h index 248eedfd98..eaaef07d56 100644 --- a/src/soc/intel/alderlake/chip.h +++ b/src/soc/intel/alderlake/chip.h @@ -24,6 +24,7 @@ enum soc_intel_alderlake_power_limits { ADL_P_POWER_LIMITS_482_CORE, ADL_P_POWER_LIMITS_682_CORE, ADL_M_POWER_LIMITS_282_CORE, + ADL_M_POWER_LIMITS_242_CORE, ADL_POWER_LIMITS_COUNT }; diff --git a/src/soc/intel/alderlake/chipset.cb b/src/soc/intel/alderlake/chipset.cb index 05da658eac..eff64f17d4 100644 --- a/src/soc/intel/alderlake/chipset.cb +++ b/src/soc/intel/alderlake/chipset.cb @@ -21,11 +21,17 @@ chip soc/intel/alderlake }" register "power_limits_config[ADL_M_POWER_LIMITS_282_CORE]" = "{ + .tdp_pl1_override = 15, + .tdp_pl2_override = 45, + }" + + register "power_limits_config[ADL_M_POWER_LIMITS_242_CORE]" = "{ .tdp_pl1_override = 9, .tdp_pl2_override = 30, .tdp_pl4 = 68, }" + device domain 0 on device gpio 0 alias pch_gpio on end device pci 00.0 alias system_agent on end diff --git a/src/soc/intel/alderlake/systemagent.c b/src/soc/intel/alderlake/systemagent.c index acdaded685..cfb6f798b4 100644 --- a/src/soc/intel/alderlake/systemagent.c +++ b/src/soc/intel/alderlake/systemagent.c @@ -87,6 +87,9 @@ void soc_systemagent_init(struct device *dev) case PCI_DEVICE_ID_INTEL_ADL_M_ID_1: soc_config = &config->power_limits_config[ADL_M_POWER_LIMITS_282_CORE]; break; + case PCI_DEVICE_ID_INTEL_ADL_M_ID_2: + soc_config = &config->power_limits_config[ADL_M_POWER_LIMITS_242_CORE]; + break; default: printk(BIOS_ERR, "ADL: unknown SA ID: 0x%4x, skipping power limits configuration\n", sa_pci_id); -- cgit v1.2.3