From cd2aa47a340432503ba67672e19931ed2f3296bf Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Ky=C3=B6sti=20M=C3=A4lkki?= Date: Sun, 18 Aug 2019 16:33:06 +0300 Subject: devicetree: Remove duplicate chip_ops declarations MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit These are only referenced inside auto-generated static.c files, and util/sconfig also generates the declarations automatically from source file pathnames. Change-Id: Id324790755095c36fbeb73a4d8f9d01cdf6409cb Signed-off-by: Kyösti Mälkki Reviewed-on: https://review.coreboot.org/c/coreboot/+/34979 Reviewed-by: Marshall Dawson Tested-by: build bot (Jenkins) --- src/soc/intel/baytrail/chip.h | 1 - src/soc/intel/braswell/chip.h | 2 -- src/soc/intel/broadwell/chip.h | 2 -- src/soc/intel/denverton_ns/chip.h | 2 -- src/soc/intel/fsp_baytrail/chip.h | 1 - src/soc/intel/fsp_broadwell_de/chip.h | 1 - src/soc/intel/quark/chip.h | 2 -- src/soc/intel/skylake/chip.h | 2 -- 8 files changed, 13 deletions(-) (limited to 'src/soc/intel') diff --git a/src/soc/intel/baytrail/chip.h b/src/soc/intel/baytrail/chip.h index 00e7fd6f73..f153913a0f 100644 --- a/src/soc/intel/baytrail/chip.h +++ b/src/soc/intel/baytrail/chip.h @@ -87,5 +87,4 @@ struct soc_intel_baytrail_config { int disable_ddr_2x_refresh_rate; }; -extern struct chip_operations soc_intel_baytrail_ops; #endif /* _BAYTRAIL_CHIP_H_ */ diff --git a/src/soc/intel/braswell/chip.h b/src/soc/intel/braswell/chip.h index 5a00328f4d..747b941f55 100644 --- a/src/soc/intel/braswell/chip.h +++ b/src/soc/intel/braswell/chip.h @@ -171,6 +171,4 @@ struct soc_intel_braswell_config { UINT8 I2C6Frequency; }; -extern struct chip_operations soc_intel_braswell_ops; - #endif /* _SOC_CHIP_H_ */ diff --git a/src/soc/intel/broadwell/chip.h b/src/soc/intel/broadwell/chip.h index 0885c2dd5b..456a4354ca 100644 --- a/src/soc/intel/broadwell/chip.h +++ b/src/soc/intel/broadwell/chip.h @@ -164,6 +164,4 @@ struct soc_intel_broadwell_config { typedef struct soc_intel_broadwell_config config_t; -extern struct chip_operations soc_ops; - #endif diff --git a/src/soc/intel/denverton_ns/chip.h b/src/soc/intel/denverton_ns/chip.h index f2a67dd9f9..53e86f97b0 100644 --- a/src/soc/intel/denverton_ns/chip.h +++ b/src/soc/intel/denverton_ns/chip.h @@ -72,8 +72,6 @@ struct soc_intel_denverton_ns_config { uint32_t ipc3; }; -extern struct chip_operations soc_intel_denverton_ns_ops; - typedef struct soc_intel_denverton_ns_config config_t; #endif /* SOC_INTEL_FSP_DENVERTON_NS_CHIP_H */ diff --git a/src/soc/intel/fsp_baytrail/chip.h b/src/soc/intel/fsp_baytrail/chip.h index 156a08434c..b73aa14904 100644 --- a/src/soc/intel/fsp_baytrail/chip.h +++ b/src/soc/intel/fsp_baytrail/chip.h @@ -353,5 +353,4 @@ struct soc_intel_fsp_baytrail_config { }; -extern struct chip_operations soc_intel_fsp_baytrail_ops; #endif /* _FSP_BAYTRAIL_CHIP_H_ */ diff --git a/src/soc/intel/fsp_broadwell_de/chip.h b/src/soc/intel/fsp_broadwell_de/chip.h index b7f59f7f12..bf2896238a 100644 --- a/src/soc/intel/fsp_broadwell_de/chip.h +++ b/src/soc/intel/fsp_broadwell_de/chip.h @@ -29,5 +29,4 @@ struct soc_intel_fsp_broadwell_de_config { typedef struct soc_intel_fsp_broadwell_de_config config_t; -extern struct chip_operations soc_intel_fsp_broadwell_de_ops; #endif /* _SOC_CHIP_H_ */ diff --git a/src/soc/intel/quark/chip.h b/src/soc/intel/quark/chip.h index 25d734a7df..4e57273ffe 100644 --- a/src/soc/intel/quark/chip.h +++ b/src/soc/intel/quark/chip.h @@ -113,6 +113,4 @@ struct soc_intel_quark_config { uint8_t SmmTsegSize; /* SMM size in MiB */ }; -extern struct chip_operations soc_ops; - #endif diff --git a/src/soc/intel/skylake/chip.h b/src/soc/intel/skylake/chip.h index 6c105cea8c..1313dc15b9 100644 --- a/src/soc/intel/skylake/chip.h +++ b/src/soc/intel/skylake/chip.h @@ -591,6 +591,4 @@ struct soc_intel_skylake_config { typedef struct soc_intel_skylake_config config_t; -extern struct chip_operations soc_ops; - #endif -- cgit v1.2.3