From c5d0761dea84b28cd5993b8775a4559974cc8c04 Mon Sep 17 00:00:00 2001 From: Jeremy Soller Date: Tue, 26 Jul 2022 08:18:38 -0600 Subject: soc/intel/cnl: Add Cometlake-H/S Q0 (10+2) CPU ID The Q0 stepping has a different ID than P1. Reference: CML EDS Volume 1 (Intel doc #606599) Change-Id: Id1da42aa93ab3440ae743d943a00713b7df3f453 Signed-off-by: Jeremy Soller Signed-off-by: Tim Crawford Reviewed-on: https://review.coreboot.org/c/coreboot/+/66159 Tested-by: build bot (Jenkins) Reviewed-by: Angel Pons --- src/soc/intel/cannonlake/bootblock/report_platform.c | 3 ++- src/soc/intel/common/block/cpu/mp_init.c | 3 ++- 2 files changed, 4 insertions(+), 2 deletions(-) (limited to 'src/soc/intel') diff --git a/src/soc/intel/cannonlake/bootblock/report_platform.c b/src/soc/intel/cannonlake/bootblock/report_platform.c index 578cbbf977..c168431b03 100644 --- a/src/soc/intel/cannonlake/bootblock/report_platform.c +++ b/src/soc/intel/cannonlake/bootblock/report_platform.c @@ -33,7 +33,8 @@ static struct { { CPUID_COMETLAKE_H_S_6_2_G0, "Cometlake-H/S G0 (6+2)" }, { CPUID_COMETLAKE_H_S_6_2_G1, "Cometlake-H/S G1 (6+2)" }, { CPUID_COMETLAKE_H_S_10_2_P0, "Cometlake-H/S P0 (10+2)" }, - { CPUID_COMETLAKE_H_S_10_2_Q0_P1, "Cometlake-H/S Q0/P1 (10+2)" }, + { CPUID_COMETLAKE_H_S_10_2_P1, "Cometlake-H/S P1 (10+2)" }, + { CPUID_COMETLAKE_H_S_10_2_Q0, "Cometlake-H/S Q0 (10+2)" }, }; static struct { diff --git a/src/soc/intel/common/block/cpu/mp_init.c b/src/soc/intel/common/block/cpu/mp_init.c index 754c485ba5..d8ca0b3a9a 100644 --- a/src/soc/intel/common/block/cpu/mp_init.c +++ b/src/soc/intel/common/block/cpu/mp_init.c @@ -66,7 +66,8 @@ static const struct cpu_device_id cpu_table[] = { { X86_VENDOR_INTEL, CPUID_COMETLAKE_H_S_6_2_G0 }, { X86_VENDOR_INTEL, CPUID_COMETLAKE_H_S_6_2_G1 }, { X86_VENDOR_INTEL, CPUID_COMETLAKE_H_S_10_2_P0 }, - { X86_VENDOR_INTEL, CPUID_COMETLAKE_H_S_10_2_Q0_P1 }, + { X86_VENDOR_INTEL, CPUID_COMETLAKE_H_S_10_2_P1 }, + { X86_VENDOR_INTEL, CPUID_COMETLAKE_H_S_10_2_Q0 }, { X86_VENDOR_INTEL, CPUID_TIGERLAKE_A0 }, { X86_VENDOR_INTEL, CPUID_TIGERLAKE_B0 }, { X86_VENDOR_INTEL, CPUID_TIGERLAKE_R0 }, -- cgit v1.2.3