From c5c6372395ece2c8a376e284f2c215e1d2738307 Mon Sep 17 00:00:00 2001 From: Ivy Jian Date: Fri, 31 Mar 2023 17:56:11 +0800 Subject: soc/intel/meteorlake: Fix PortUsb30Enable configuration PortUsb30Enable has been overridden unexpectedly, this patch fixed it. BUG=b:276181378 Test=boot to rex and check USB3 ports are working. Signed-off-by: Ivy Jian Change-Id: Ic04b9eb236ed28a76ee516c52fc0c983cb8f2c0e Reviewed-on: https://review.coreboot.org/c/coreboot/+/74143 Tested-by: build bot (Jenkins) Reviewed-by: Subrata Banik Reviewed-by: Kapil Porwal Reviewed-by: Eric Lai --- src/soc/intel/meteorlake/fsp_params.c | 1 - 1 file changed, 1 deletion(-) (limited to 'src/soc/intel') diff --git a/src/soc/intel/meteorlake/fsp_params.c b/src/soc/intel/meteorlake/fsp_params.c index 041429dcc4..d345f1b27d 100644 --- a/src/soc/intel/meteorlake/fsp_params.c +++ b/src/soc/intel/meteorlake/fsp_params.c @@ -487,7 +487,6 @@ static void fill_fsps_xhci_params(FSP_S_CONFIG *s_cfg, max_port = get_max_tcss_port(); for (i = 0; i < max_port; i++) { - s_cfg->PortUsb30Enable[i] = config->tcss_ports[i].enable; if (config->tcss_ports[i].enable) s_cfg->CpuUsb3OverCurrentPin[i] = config->tcss_ports[i].ocpin; } -- cgit v1.2.3