From bd7020d68cca2d64869e9fd59cfcb125d80589ad Mon Sep 17 00:00:00 2001 From: Felix Singer Date: Sun, 6 Dec 2020 11:32:25 +0100 Subject: soc/intel/skylake: Restore alphabetical order of Kconfig selects MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Built clevo/n130wu with BUILD_TIMELESS=1, coreboot.rom remains identical. Change-Id: I6a5c694a9686a5435aa5c64647286a6017f9aa13 Signed-off-by: Felix Singer Reviewed-on: https://review.coreboot.org/c/coreboot/+/48376 Reviewed-by: Frans Hendriks Reviewed-by: Michael Niewöhner Tested-by: build bot (Jenkins) --- src/soc/intel/skylake/Kconfig | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) (limited to 'src/soc/intel') diff --git a/src/soc/intel/skylake/Kconfig b/src/soc/intel/skylake/Kconfig index 314a08bc82..3eae5f8ff5 100644 --- a/src/soc/intel/skylake/Kconfig +++ b/src/soc/intel/skylake/Kconfig @@ -30,20 +30,20 @@ config CPU_SPECIFIC_OPTIONS select GENERIC_GPIO_LIB select HAVE_FSP_GOP select HAVE_FSP_LOGO_SUPPORT - select INTEL_DESCRIPTOR_MODE_CAPABLE + select HAVE_INTEL_FSP_REPO select HAVE_SMI_HANDLER + select INTEL_DESCRIPTOR_MODE_CAPABLE select INTEL_GMA_ACPI select INTEL_GMA_ADD_VBT if RUN_FSP_GOP - select HAVE_INTEL_FSP_REPO select IOAPIC select MRC_SETTINGS_PROTECT select PARALLEL_MP select PARALLEL_MP_AP_WORK select PLATFORM_USES_FSP2_0 - select REG_SCRIPT - select SA_ENABLE_DPR select PM_ACPI_TIMER_OPTIONAL select PMC_GLOBAL_RESET_ENABLE_LOCK + select REG_SCRIPT + select SA_ENABLE_DPR select SOC_INTEL_COMMON select SOC_INTEL_COMMON_ACPI_WAKE_SOURCE select SOC_INTEL_COMMON_BLOCK -- cgit v1.2.3