From bac27d5ebbc9114df2e6e43e45bfe3f2b6613e06 Mon Sep 17 00:00:00 2001 From: Frans Hendriks Date: Fri, 26 Apr 2019 15:37:21 +0200 Subject: soc/intel/braswell: Move LPE ACPI code to mainboard MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit The ACPI code of LPE device is included regardless of the availability of the LPE controller. Linux remains requesting the status of device LPEA even if this device is disabled. Include ACPI LPE controller code at Braswell mainboards with LPE enabled. BUG=N/A TEST=Linux 4.17+ on Portwell PQ7-M107 Change-Id: Ic8acf9ea9e9b0ba9b272e20beb2023b7a4716a73 Signed-off-by: Frans Hendriks Reviewed-on: https://review.coreboot.org/c/coreboot/+/29414 Tested-by: build bot (Jenkins) Reviewed-by: Nico Huber Reviewed-by: Michał Żygowski --- src/soc/intel/braswell/acpi/southcluster.asl | 3 --- 1 file changed, 3 deletions(-) (limited to 'src/soc/intel') diff --git a/src/soc/intel/braswell/acpi/southcluster.asl b/src/soc/intel/braswell/acpi/southcluster.asl index f7e3168126..9ecf67a971 100644 --- a/src/soc/intel/braswell/acpi/southcluster.asl +++ b/src/soc/intel/braswell/acpi/southcluster.asl @@ -286,7 +286,4 @@ Scope (\_SB.PCI0) /* SCC Devices */ #include "scc.asl" - - /* LPE Device */ - #include "lpe.asl" } -- cgit v1.2.3