From b6b1b237eba2d1b817185a32b8bb3f242f3db2b5 Mon Sep 17 00:00:00 2001 From: Youness Alaoui Date: Thu, 22 Jun 2017 15:43:49 -0400 Subject: console/flashconsole: Enable support for postcar If FSP 2.0 is used, then postcar stage is used and the flashconsole as well as spi drivers needed to be added. Change-Id: I46d720a9d1fe18a95c9407d08dae1eb70ae6720e Signed-off-by: Youness Alaoui Reviewed-on: https://review.coreboot.org/21959 Tested-by: build bot (Jenkins) Reviewed-by: Furquan Shaikh Reviewed-by: Aaron Durbin --- src/soc/intel/common/block/gspi/Makefile.inc | 1 + src/soc/intel/skylake/Makefile.inc | 2 ++ 2 files changed, 3 insertions(+) (limited to 'src/soc/intel') diff --git a/src/soc/intel/common/block/gspi/Makefile.inc b/src/soc/intel/common/block/gspi/Makefile.inc index 85cb18ebb8..2eb13fa347 100644 --- a/src/soc/intel/common/block/gspi/Makefile.inc +++ b/src/soc/intel/common/block/gspi/Makefile.inc @@ -2,3 +2,4 @@ bootblock-$(CONFIG_SOC_INTEL_COMMON_BLOCK_GSPI) += gspi.c romstage-$(CONFIG_SOC_INTEL_COMMON_BLOCK_GSPI) += gspi.c ramstage-$(CONFIG_SOC_INTEL_COMMON_BLOCK_GSPI) += gspi.c verstage-$(CONFIG_SOC_INTEL_COMMON_BLOCK_GSPI) += gspi.c +postcar-$(CONFIG_SOC_INTEL_COMMON_BLOCK_GSPI) += gspi.c diff --git a/src/soc/intel/skylake/Makefile.inc b/src/soc/intel/skylake/Makefile.inc index d12ba0878a..9a8372b8f1 100644 --- a/src/soc/intel/skylake/Makefile.inc +++ b/src/soc/intel/skylake/Makefile.inc @@ -82,6 +82,8 @@ smm-y += uart.c postcar-y += memmap.c postcar-$(CONFIG_UART_DEBUG) += uart_debug.c +postcar-y += gspi.c +postcar-y += spi.c # cpu_microcode_bins += ??? -- cgit v1.2.3