From b4a09c03f73c966d55445b6674f0d982919c719d Mon Sep 17 00:00:00 2001 From: Bernardo Perez Priego Date: Mon, 21 Jun 2021 10:49:47 -0700 Subject: soc/intel/alderlake: Update s0ix cstate table Cstate C7 is not supported in ADL, replacing this unsupported state with C6 in the s0ix cstate table. BUG=None TEST=Boot device to OS. Print supported CStates and latencies. Signed-off-by: Bernardo Perez Priego Change-Id: I471f71481d337e3fafa4acab7fe8a39677c8710c Reviewed-on: https://review.coreboot.org/c/coreboot/+/55734 Reviewed-by: Tim Wawrzynczak Reviewed-by: Sukumar Ghorai Tested-by: build bot (Jenkins) --- src/soc/intel/alderlake/acpi.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'src/soc/intel') diff --git a/src/soc/intel/alderlake/acpi.c b/src/soc/intel/alderlake/acpi.c index 23d2a262e6..1f49719979 100644 --- a/src/soc/intel/alderlake/acpi.c +++ b/src/soc/intel/alderlake/acpi.c @@ -107,7 +107,7 @@ static int cstate_set_non_s0ix[] = { static int cstate_set_s0ix[] = { C_STATE_C1, - C_STATE_C7S_LONG_LAT, + C_STATE_C6_LONG_LAT, C_STATE_C10 }; -- cgit v1.2.3