From a963acdcc70747911981afcd1474d39d75ca8804 Mon Sep 17 00:00:00 2001 From: Kyösti Mälkki Date: Fri, 16 Aug 2019 20:34:25 +0300 Subject: arch/x86: Add MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Start with moving all postcar_frame related function declarations here from . Change-Id: I9aeef07f9009e44cc08927c85fe1862edf5c70dc Signed-off-by: Kyösti Mälkki Reviewed-on: https://review.coreboot.org/c/coreboot/+/34911 Reviewed-by: Aaron Durbin Reviewed-by: HAOUAS Elyes Tested-by: build bot (Jenkins) --- src/soc/intel/apollolake/romstage.c | 1 + src/soc/intel/baytrail/romstage/romstage.c | 1 + src/soc/intel/broadwell/romstage/romstage.c | 2 +- src/soc/intel/cannonlake/romstage/romstage.c | 1 + src/soc/intel/denverton_ns/romstage.c | 1 + src/soc/intel/icelake/romstage/romstage.c | 1 + src/soc/intel/quark/romstage/fsp2_0.c | 1 + src/soc/intel/skylake/romstage/romstage_fsp20.c | 1 + 8 files changed, 8 insertions(+), 1 deletion(-) (limited to 'src/soc/intel') diff --git a/src/soc/intel/apollolake/romstage.c b/src/soc/intel/apollolake/romstage.c index fb8473c512..1464d2c6b3 100644 --- a/src/soc/intel/apollolake/romstage.c +++ b/src/soc/intel/apollolake/romstage.c @@ -17,6 +17,7 @@ */ #include +#include #include #include #include diff --git a/src/soc/intel/baytrail/romstage/romstage.c b/src/soc/intel/baytrail/romstage/romstage.c index 63e36aaa36..f20c363a35 100644 --- a/src/soc/intel/baytrail/romstage/romstage.c +++ b/src/soc/intel/baytrail/romstage/romstage.c @@ -16,6 +16,7 @@ #include #include #include +#include #include #include #include diff --git a/src/soc/intel/broadwell/romstage/romstage.c b/src/soc/intel/broadwell/romstage/romstage.c index e7b8ae0180..3f264ff5ec 100644 --- a/src/soc/intel/broadwell/romstage/romstage.c +++ b/src/soc/intel/broadwell/romstage/romstage.c @@ -16,7 +16,7 @@ #include #include #include -#include +#include #include #include #include diff --git a/src/soc/intel/cannonlake/romstage/romstage.c b/src/soc/intel/cannonlake/romstage/romstage.c index 94b9899422..9f02c8b1d3 100644 --- a/src/soc/intel/cannonlake/romstage/romstage.c +++ b/src/soc/intel/cannonlake/romstage/romstage.c @@ -14,6 +14,7 @@ */ #include +#include #include #include #include diff --git a/src/soc/intel/denverton_ns/romstage.c b/src/soc/intel/denverton_ns/romstage.c index 53c51f488c..9c41486aa2 100644 --- a/src/soc/intel/denverton_ns/romstage.c +++ b/src/soc/intel/denverton_ns/romstage.c @@ -15,6 +15,7 @@ */ #include +#include #include #include #include diff --git a/src/soc/intel/icelake/romstage/romstage.c b/src/soc/intel/icelake/romstage/romstage.c index 65e65cc80e..8312f178e4 100644 --- a/src/soc/intel/icelake/romstage/romstage.c +++ b/src/soc/intel/icelake/romstage/romstage.c @@ -14,6 +14,7 @@ */ #include +#include #include #include #include diff --git a/src/soc/intel/quark/romstage/fsp2_0.c b/src/soc/intel/quark/romstage/fsp2_0.c index 20f2ad776b..0489621045 100644 --- a/src/soc/intel/quark/romstage/fsp2_0.c +++ b/src/soc/intel/quark/romstage/fsp2_0.c @@ -14,6 +14,7 @@ */ #include +#include #include #include #include diff --git a/src/soc/intel/skylake/romstage/romstage_fsp20.c b/src/soc/intel/skylake/romstage/romstage_fsp20.c index 221c6c41d5..8b5cd18195 100644 --- a/src/soc/intel/skylake/romstage/romstage_fsp20.c +++ b/src/soc/intel/skylake/romstage/romstage_fsp20.c @@ -14,6 +14,7 @@ */ #include +#include #include #include #include -- cgit v1.2.3