From 9e0d69bf1e0194509108eba23511a12d597ae49e Mon Sep 17 00:00:00 2001 From: Matt DeVillier Date: Tue, 10 Oct 2017 14:03:36 -0500 Subject: soc/intel/skylake: pass SataSpeedLimit param to FSP2 The Librem13v2 needs to set this parameter to work around power-related issues with some SATA devices. Change-Id: I7fcef36ec8662e18834394b72427a0633c6b7e92 Signed-off-by: Matt DeVillier Reviewed-on: https://review.coreboot.org/22045 Reviewed-by: Youness Alaoui Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin --- src/soc/intel/skylake/chip.h | 1 + src/soc/intel/skylake/chip_fsp20.c | 2 ++ 2 files changed, 3 insertions(+) (limited to 'src/soc/intel') diff --git a/src/soc/intel/skylake/chip.h b/src/soc/intel/skylake/chip.h index 022306cef3..2c282bc17f 100644 --- a/src/soc/intel/skylake/chip.h +++ b/src/soc/intel/skylake/chip.h @@ -148,6 +148,7 @@ struct soc_intel_skylake_config { u8 SataSalpSupport; u8 SataPortsEnable[8]; u8 SataPortsDevSlp[8]; + u8 SataSpeedLimit; /* Audio related */ u8 EnableAzalia; diff --git a/src/soc/intel/skylake/chip_fsp20.c b/src/soc/intel/skylake/chip_fsp20.c index f9bdf8a1ef..bc0f5a5678 100644 --- a/src/soc/intel/skylake/chip_fsp20.c +++ b/src/soc/intel/skylake/chip_fsp20.c @@ -206,6 +206,8 @@ void platform_fsp_silicon_init_params_cb(FSPS_UPD *supd) params->Device4Enable = config->Device4Enable; params->SataEnable = config->EnableSata; params->SataMode = config->SataMode; + params->SataSpeedLimit = config->SataSpeedLimit; + tconfig->PchLockDownGlobalSmi = config->LockDownConfigGlobalSmi; tconfig->PchLockDownRtcLock = config->LockDownConfigRtcLock; /* -- cgit v1.2.3