From 9d894b856361f6f8978d6c27557f8dd0bd84d2df Mon Sep 17 00:00:00 2001 From: Sean Rhodes Date: Thu, 26 May 2022 22:20:41 +0100 Subject: soc/intel/apollolake: Hook up C1e to enhanced_cstates Hook up C1e FSP S UPD which enables enhanced C-states, to enhanced_cstates. This allows it to be enabled in the devicetree with a value of "1" as the default is disabled. C1e exists on both APL and GLK, and has been there since their initial releases. Signed-off-by: Sean Rhodes Change-Id: Ie803a75ac9fb64a6c21b31baeea7b736e4fbf5fa Reviewed-on: https://review.coreboot.org/c/coreboot/+/64708 Tested-by: build bot (Jenkins) Reviewed-by: Matt DeVillier Reviewed-by: Angel Pons --- src/soc/intel/apollolake/chip.c | 3 +++ src/soc/intel/apollolake/chip.h | 3 +++ 2 files changed, 6 insertions(+) (limited to 'src/soc/intel') diff --git a/src/soc/intel/apollolake/chip.c b/src/soc/intel/apollolake/chip.c index 20bbde9288..e824328350 100644 --- a/src/soc/intel/apollolake/chip.c +++ b/src/soc/intel/apollolake/chip.c @@ -717,6 +717,9 @@ void platform_fsp_silicon_init_params_cb(FSPS_UPD *silupd) silconfig->VmxEnable = CONFIG(ENABLE_VMX); + /* Enable enhanced C-states */ + silconfig->C1e = cfg->enhanced_cstates; + /* Set VTD feature according to devicetree */ silconfig->VtdEnable = get_uint_option("vtd", cfg->enable_vtd); diff --git a/src/soc/intel/apollolake/chip.h b/src/soc/intel/apollolake/chip.h index 209937d775..de3ba9780c 100644 --- a/src/soc/intel/apollolake/chip.h +++ b/src/soc/intel/apollolake/chip.h @@ -135,6 +135,9 @@ struct soc_intel_apollolake_config { uint8_t hdaudio_pwr_gate_enable; uint8_t hdaudio_bios_config_lockdown; + /* Enhanced C-states */ + int enhanced_cstates; + /* SLP S3 minimum assertion width. */ int slp_s3_assertion_width_usecs; -- cgit v1.2.3