From 9cb88a70f7a636806752542216e177ba625e77d2 Mon Sep 17 00:00:00 2001 From: Frans Hendriks Date: Fri, 6 Dec 2019 11:54:01 +0100 Subject: src: Conditionally include TEVT MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit ACPI method TEVT is reported as unused by iASL (20190509) when ChromeEC support is not enabled. The message is “Method Argument is never used (Arg0)” on Method (TEVT, 1, NotSerialized), which indicates the TEVT method is empty. The solution is to only enable the TEVT code in mainboard or SoC when an EC is used that uses this event. The TEVT code in the EC is only enabled if the mainboard or SoC code implements TEVT. The TEVT method will be removed from the ASL code when the EC does not support TEVT. BUG=N/A TEST=Tested on facebook monolith. Change-Id: I8d2e14407ae2338e58797cdc7eb7d0cadf3cc26e Signed-off-by: Wim Vervoorn Reviewed-on: https://review.coreboot.org/c/coreboot/+/37560 Tested-by: build bot (Jenkins) Reviewed-by: Frans Hendriks --- src/soc/intel/baytrail/acpi/dptf/thermal.asl | 3 +++ src/soc/intel/braswell/acpi/dptf/thermal.asl | 4 +++- src/soc/intel/common/acpi/dptf/thermal.asl | 3 +++ src/soc/intel/skylake/acpi/dptf/thermal.asl | 3 +++ 4 files changed, 12 insertions(+), 1 deletion(-) (limited to 'src/soc/intel') diff --git a/src/soc/intel/baytrail/acpi/dptf/thermal.asl b/src/soc/intel/baytrail/acpi/dptf/thermal.asl index d84ae4b040..106cd77015 100644 --- a/src/soc/intel/baytrail/acpi/dptf/thermal.asl +++ b/src/soc/intel/baytrail/acpi/dptf/thermal.asl @@ -14,6 +14,8 @@ /* Thermal Threshold Event Handler */ #define HAVE_THERM_EVENT_HANDLER + +#if CONFIG(EC_SUPPORTS_DPTF_TEVT) Method (TEVT, 1, NotSerialized) { Store (ToInteger (Arg0), Local0) @@ -34,6 +36,7 @@ Method (TEVT, 1, NotSerialized) } #endif } +#endif /* Thermal device initialization - Disable Aux Trip Points */ Method (TINI) diff --git a/src/soc/intel/braswell/acpi/dptf/thermal.asl b/src/soc/intel/braswell/acpi/dptf/thermal.asl index 1fdbea01ca..7daa36c8d4 100644 --- a/src/soc/intel/braswell/acpi/dptf/thermal.asl +++ b/src/soc/intel/braswell/acpi/dptf/thermal.asl @@ -15,7 +15,9 @@ */ /* Thermal Threshold Event Handler */ -#ifdef HAVE_THERM_EVENT_HANDLER +#define HAVE_THERM_EVENT_HANDLER + +#if CONFIG(EC_SUPPORTS_DPTF_TEVT) Method (TEVT, 1, NotSerialized) { Store (ToInteger (Arg0), Local0) diff --git a/src/soc/intel/common/acpi/dptf/thermal.asl b/src/soc/intel/common/acpi/dptf/thermal.asl index d41f62354b..7058b27f38 100644 --- a/src/soc/intel/common/acpi/dptf/thermal.asl +++ b/src/soc/intel/common/acpi/dptf/thermal.asl @@ -16,6 +16,8 @@ /* Thermal Threshold Event Handler */ #define HAVE_THERM_EVENT_HANDLER + +#if CONFIG(EC_SUPPORTS_DPTF_TEVT) Method (TEVT, 1, NotSerialized) { Store (ToInteger (Arg0), Local0) @@ -41,6 +43,7 @@ Method (TEVT, 1, NotSerialized) } #endif } +#endif /* Thermal device initialization - Disable Aux Trip Points */ Method (TINI) diff --git a/src/soc/intel/skylake/acpi/dptf/thermal.asl b/src/soc/intel/skylake/acpi/dptf/thermal.asl index 5f3548e014..742b092311 100644 --- a/src/soc/intel/skylake/acpi/dptf/thermal.asl +++ b/src/soc/intel/skylake/acpi/dptf/thermal.asl @@ -16,6 +16,8 @@ /* Thermal Threshold Event Handler */ #define HAVE_THERM_EVENT_HANDLER + +#if CONFIG(EC_SUPPORTS_DPTF_TEVT) Method (TEVT, 1, NotSerialized) { @@ -40,6 +42,7 @@ Method (TEVT, 1, NotSerialized) } #endif } +#endif /* Thermal device initialization - Disable Aux Trip Points */ Method (TINI) -- cgit v1.2.3