From 98b696703e8e508dd57b467a557f9bc7567f7e6d Mon Sep 17 00:00:00 2001 From: Subrata Banik Date: Wed, 23 Nov 2022 14:46:16 +0530 Subject: soc/intel/meteorlake: Decouple HECI disabling interface from its Kconfig This patch decouples HECI disabling interface a.k.a SMM or PCR or PMC IPC etc. from DISABLE_HECI1_AT_PRE_BOOT kconfig as Intel ME BWG recommends to disable the CSE PCI device while CSE is in software temporary disable state. BUG=b:260183610 TEST=Able to build google/rex. Signed-off-by: Subrata Banik Change-Id: I3c9c5a73028cde90af3553093a13d0c05b831bae Reviewed-on: https://review.coreboot.org/c/coreboot/+/69930 Reviewed-by: Ivy Jian Reviewed-by: Kapil Porwal Reviewed-by: Eric Lai Tested-by: build bot (Jenkins) --- src/soc/intel/meteorlake/Kconfig | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'src/soc/intel') diff --git a/src/soc/intel/meteorlake/Kconfig b/src/soc/intel/meteorlake/Kconfig index dcb2556d0d..c3efd3e381 100644 --- a/src/soc/intel/meteorlake/Kconfig +++ b/src/soc/intel/meteorlake/Kconfig @@ -60,7 +60,7 @@ config CPU_SPECIFIC_OPTIONS select SOC_INTEL_COMMON_BLOCK_GPIO_PMODE_4BITS select SOC_INTEL_COMMON_BLOCK_GSPI_VERSION_2 select SOC_INTEL_COMMON_BLOCK_HDA - select SOC_INTEL_COMMON_BLOCK_HECI1_DISABLE_USING_PMC_IPC if DISABLE_HECI1_AT_PRE_BOOT + select SOC_INTEL_COMMON_BLOCK_HECI1_DISABLE_USING_PMC_IPC select SOC_INTEL_COMMON_BLOCK_IPU select SOC_INTEL_COMMON_BLOCK_IOE_P2SB select SOC_INTEL_COMMON_BLOCK_MEMINIT -- cgit v1.2.3