From 9413cb5f95567abc7d2846f2853504304eed1483 Mon Sep 17 00:00:00 2001 From: Nico Huber Date: Thu, 6 Jul 2017 15:06:37 +0200 Subject: soc/intel/skylake: Fix PMC address range setup for PCH-H The PMC of PCH-H requires a different destination id. TEST=Run on kontron/bsl6 and observed that PM registers are correctly dumped at start of romstage. Change-Id: I862e4df986f1cdea34f8fa45d016fb6b51f29122 Signed-off-by: Nico Huber Reviewed-on: https://review.coreboot.org/20479 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer Reviewed-by: Paul Menzel --- src/soc/intel/skylake/bootblock/pch.c | 10 ++++++++-- 1 file changed, 8 insertions(+), 2 deletions(-) (limited to 'src/soc/intel') diff --git a/src/soc/intel/skylake/bootblock/pch.c b/src/soc/intel/skylake/bootblock/pch.c index 0b212b11b0..2502563a30 100644 --- a/src/soc/intel/skylake/bootblock/pch.c +++ b/src/soc/intel/skylake/bootblock/pch.c @@ -141,7 +141,10 @@ static void soc_config_acpibase(void) */ reg32 = ((0x3f << 18) | ACPI_BASE_ADDRESS | 1); pcr_write32(PID_DMI, PCR_DMI_ACPIBA, reg32); - pcr_write32(PID_DMI, PCR_DMI_ACPIBDID, 0x23A0); + if (IS_ENABLED(CONFIG_SKYLAKE_SOC_PCH_H)) + pcr_write32(PID_DMI, PCR_DMI_ACPIBDID, 0x23a8); + else + pcr_write32(PID_DMI, PCR_DMI_ACPIBDID, 0x23a0); } static void soc_config_pwrmbase(void) @@ -172,7 +175,10 @@ static void soc_config_pwrmbase(void) pcr_write32(PID_DMI, PCR_DMI_PMBASEA, ((PCH_PWRM_BASE_ADDRESS & 0xFFFF0000) | (PCH_PWRM_BASE_ADDRESS >> 16))); - pcr_write32(PID_DMI, PCR_DMI_PMBASEC, 0x800023A0); + if (IS_ENABLED(CONFIG_SKYLAKE_SOC_PCH_H)) + pcr_write32(PID_DMI, PCR_DMI_PMBASEC, 0x800023a8); + else + pcr_write32(PID_DMI, PCR_DMI_PMBASEC, 0x800023a0); } static void soc_config_tco(void) -- cgit v1.2.3