From 9405541b1aebb501969370afcf876bf5052c7152 Mon Sep 17 00:00:00 2001 From: Subrata Banik Date: Wed, 17 May 2023 14:33:55 +0530 Subject: =?UTF-8?q?soc/intel/meteorlake:=C2=A0Add=20`.final`=20to=20check?= =?UTF-8?q?=20FSP=20reset=20pending=20request?= MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit This patch adds an API to check FSP reset pending requests. This information is useful to understand if FSP would like boot firmware to issue any reset to complete the silicon initialization. As per recent debug it has been found that, FSP is accumulating all platform resets and executing a single reset from FSP Notify Phase. As coreboot skipped calling into the FSP Notify APIs hence, it might have missed the scope to issue the platform reset. BUG=b:282266168 TEST=Able to build and boot google/rex and able to detect FSP reset pending request. Signed-off-by: Subrata Banik Change-Id: Ibf7c996f09affa099c9124773fe2d581f370d1a9 Reviewed-on: https://review.coreboot.org/c/coreboot/+/75310 Tested-by: build bot (Jenkins) Reviewed-by: Kapil Porwal --- src/soc/intel/meteorlake/chip.c | 17 +++++++++++++++++ 1 file changed, 17 insertions(+) (limited to 'src/soc/intel') diff --git a/src/soc/intel/meteorlake/chip.c b/src/soc/intel/meteorlake/chip.c index 036c126d45..d249dd4489 100644 --- a/src/soc/intel/meteorlake/chip.c +++ b/src/soc/intel/meteorlake/chip.c @@ -15,6 +15,7 @@ #include #include #include +#include #include #include #include @@ -226,8 +227,24 @@ static void soc_enable(struct device *dev) block_gpio_enable(dev); } +static void soc_init_final_device(void *chip_info) +{ + uint32_t reset_status = fsp_get_pch_reset_status(); + + if (reset_status == FSP_SUCCESS) + return; + + /* Handle any pending reset request from previously executed FSP APIs */ + fsp_handle_reset(reset_status); + + /* Control shouldn't return here */ + die_with_post_code(POST_HW_INIT_FAILURE, + "Failed to handle the FSP reset request with error 0x%08x\n", reset_status); +} + struct chip_operations soc_intel_meteorlake_ops = { CHIP_NAME("Intel Meteorlake") .enable_dev = &soc_enable, .init = &soc_init_pre_device, + .final = &soc_init_final_device, }; -- cgit v1.2.3