From 730df3cc43d76d830f6c88441d8bea75b9047a6c Mon Sep 17 00:00:00 2001 From: Kyösti Mälkki Date: Sat, 18 Jun 2016 07:39:31 +0300 Subject: arch/x86: Make RELOCATABLE_RAMSTAGE the default MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit No need to provide an option to try disable this. Also remove explicit ´select RELOCATABLE_MODULES' lines from platform Kconfigs. Change-Id: I5fb169f90331ce37b4113378405323ec856d6fee Signed-off-by: Kyösti Mälkki Reviewed-on: https://review.coreboot.org/26815 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi --- src/soc/intel/apollolake/Kconfig | 3 +-- src/soc/intel/baytrail/Kconfig | 3 --- src/soc/intel/braswell/Kconfig | 5 +---- src/soc/intel/broadwell/Kconfig | 5 +---- src/soc/intel/cannonlake/Kconfig | 4 +--- src/soc/intel/denverton_ns/Kconfig | 1 - src/soc/intel/quark/Kconfig | 1 - src/soc/intel/skylake/Kconfig | 4 +--- 8 files changed, 5 insertions(+), 21 deletions(-) (limited to 'src/soc/intel') diff --git a/src/soc/intel/apollolake/Kconfig b/src/soc/intel/apollolake/Kconfig index 42ff3bdf39..830b32be45 100644 --- a/src/soc/intel/apollolake/Kconfig +++ b/src/soc/intel/apollolake/Kconfig @@ -40,7 +40,7 @@ config CPU_SPECIFIC_OPTIONS # Misc options select C_ENVIRONMENT_BOOTBLOCK select CACHE_MRC_SETTINGS - select CACHE_RELOCATED_RAMSTAGE_OUTSIDE_CBMEM if RELOCATABLE_RAMSTAGE + select CACHE_RELOCATED_RAMSTAGE_OUTSIDE_CBMEM select COLLECT_TIMESTAMPS select COMMON_FADT select FSP_PLATFORM_MEMORY_SETTINGS_VERSIONS @@ -62,7 +62,6 @@ config CPU_SPECIFIC_OPTIONS select POSTCAR_STAGE select PMC_INVALID_READ_AFTER_WRITE select REG_SCRIPT - select RELOCATABLE_RAMSTAGE # Build fails if this is not selected select RTC select SMM_TSEG select SA_ENABLE_IMR diff --git a/src/soc/intel/baytrail/Kconfig b/src/soc/intel/baytrail/Kconfig index 03b949c250..1f7e21e1d9 100644 --- a/src/soc/intel/baytrail/Kconfig +++ b/src/soc/intel/baytrail/Kconfig @@ -19,8 +19,6 @@ config CPU_SPECIFIC_OPTIONS select HAVE_SMI_HANDLER select HAVE_HARD_RESET select NO_FIXED_XIP_ROM_SIZE - select RELOCATABLE_MODULES - select RELOCATABLE_RAMSTAGE select PARALLEL_MP select PCIEXP_ASPM select PCIEXP_COMMON_CLOCK @@ -137,7 +135,6 @@ config DCACHE_RAM_MRC_VAR_SIZE config RESET_ON_INVALID_RAMSTAGE_CACHE bool "Reset the system on S3 wake when ramstage cache invalid." default n - depends on RELOCATABLE_RAMSTAGE help The baytrail romstage code caches the loaded ramstage program in SMM space. On S3 wake the romstage will copy over a fresh diff --git a/src/soc/intel/braswell/Kconfig b/src/soc/intel/braswell/Kconfig index 1154c041d1..23e5990d54 100644 --- a/src/soc/intel/braswell/Kconfig +++ b/src/soc/intel/braswell/Kconfig @@ -14,7 +14,7 @@ config CPU_SPECIFIC_OPTIONS select ARCH_VERSTAGE_X86_32 select BOOT_DEVICE_SUPPORTS_WRITES select CACHE_MRC_SETTINGS - select CACHE_RELOCATED_RAMSTAGE_OUTSIDE_CBMEM if RELOCATABLE_RAMSTAGE + select CACHE_RELOCATED_RAMSTAGE_OUTSIDE_CBMEM select COLLECT_TIMESTAMPS select SUPPORT_CPU_UCODE_IN_CBFS select CPU_INTEL_TURBO_NOT_PACKAGE_SCOPED @@ -22,8 +22,6 @@ config CPU_SPECIFIC_OPTIONS select HAVE_SMI_HANDLER select HAVE_HARD_RESET select NO_FIXED_XIP_ROM_SIZE - select RELOCATABLE_MODULES - select RELOCATABLE_RAMSTAGE select PARALLEL_MP select PCIEXP_ASPM select PCIEXP_CLK_PM @@ -106,7 +104,6 @@ config DCACHE_RAM_SIZE config RESET_ON_INVALID_RAMSTAGE_CACHE bool "Reset the system on S3 wake when ramstage cache invalid." default n - depends on RELOCATABLE_RAMSTAGE help The haswell romstage code caches the loaded ramstage program in SMM space. On S3 wake the romstage will copy over a fresh diff --git a/src/soc/intel/broadwell/Kconfig b/src/soc/intel/broadwell/Kconfig index 5d8d602121..1b1085a4ac 100644 --- a/src/soc/intel/broadwell/Kconfig +++ b/src/soc/intel/broadwell/Kconfig @@ -15,7 +15,7 @@ config CPU_SPECIFIC_OPTIONS select BOOT_DEVICE_SUPPORTS_WRITES select CACHE_MRC_SETTINGS select MRC_SETTINGS_PROTECT - select CACHE_RELOCATED_RAMSTAGE_OUTSIDE_CBMEM if RELOCATABLE_RAMSTAGE + select CACHE_RELOCATED_RAMSTAGE_OUTSIDE_CBMEM select CPU_INTEL_FIRMWARE_INTERFACE_TABLE select SUPPORT_CPU_UCODE_IN_CBFS select HAVE_MONOTONIC_TIMER @@ -23,8 +23,6 @@ config CPU_SPECIFIC_OPTIONS select HAVE_HARD_RESET select HAVE_USBDEBUG select IOAPIC - select RELOCATABLE_MODULES - select RELOCATABLE_RAMSTAGE select REG_SCRIPT select PARALLEL_MP select RTC @@ -159,7 +157,6 @@ config PRE_GRAPHICS_DELAY config RESET_ON_INVALID_RAMSTAGE_CACHE bool "Reset the system on S3 wake when ramstage cache invalid." default n - depends on RELOCATABLE_RAMSTAGE help The romstage code caches the loaded ramstage program in SMM space. On S3 wake the romstage will copy over a fresh ramstage that was diff --git a/src/soc/intel/cannonlake/Kconfig b/src/soc/intel/cannonlake/Kconfig index 5d8883bc9c..dd369365f9 100644 --- a/src/soc/intel/cannonlake/Kconfig +++ b/src/soc/intel/cannonlake/Kconfig @@ -17,7 +17,7 @@ config CPU_SPECIFIC_OPTIONS select BOOT_DEVICE_SUPPORTS_WRITES select C_ENVIRONMENT_BOOTBLOCK select CACHE_MRC_SETTINGS - select CACHE_RELOCATED_RAMSTAGE_OUTSIDE_CBMEM if RELOCATABLE_RAMSTAGE + select CACHE_RELOCATED_RAMSTAGE_OUTSIDE_CBMEM select COMMON_FADT select CPU_INTEL_FIRMWARE_INTERFACE_TABLE select GENERIC_GPIO_LIB @@ -37,8 +37,6 @@ config CPU_SPECIFIC_OPTIONS select POSTCAR_CONSOLE select POSTCAR_STAGE select REG_SCRIPT - select RELOCATABLE_MODULES - select RELOCATABLE_RAMSTAGE select SMM_TSEG select SMP select SOC_AHCI_PORT_IMPLEMENTED_INVERT diff --git a/src/soc/intel/denverton_ns/Kconfig b/src/soc/intel/denverton_ns/Kconfig index 35296d553d..6c366f1998 100644 --- a/src/soc/intel/denverton_ns/Kconfig +++ b/src/soc/intel/denverton_ns/Kconfig @@ -40,7 +40,6 @@ config CPU_SPECIFIC_OPTIONS select HAVE_SMI_HANDLER select SMM_TSEG select CACHE_MRC_SETTINGS - select RELOCATABLE_RAMSTAGE # Build fails if this is not selected select PARALLEL_MP select PCR_COMMON_IOSF_1_0 select SMP diff --git a/src/soc/intel/quark/Kconfig b/src/soc/intel/quark/Kconfig index d1950a378a..30bb6a2740 100644 --- a/src/soc/intel/quark/Kconfig +++ b/src/soc/intel/quark/Kconfig @@ -32,7 +32,6 @@ config CPU_SPECIFIC_OPTIONS select HAVE_MONOTONIC_TIMER select NO_MMCONF_SUPPORT select REG_SCRIPT - select RELOCATABLE_RAMSTAGE select SOC_INTEL_COMMON select SOC_INTEL_COMMON_RESET select SOC_SETS_MSRS diff --git a/src/soc/intel/skylake/Kconfig b/src/soc/intel/skylake/Kconfig index 13b18dc151..b3e9d9407e 100644 --- a/src/soc/intel/skylake/Kconfig +++ b/src/soc/intel/skylake/Kconfig @@ -24,7 +24,7 @@ config CPU_SPECIFIC_OPTIONS select BOOT_DEVICE_SPI_FLASH_RW_NOMMAP_EARLY if BOOT_DEVICE_SPI_FLASH select BOOT_DEVICE_SUPPORTS_WRITES select CACHE_MRC_SETTINGS - select CACHE_RELOCATED_RAMSTAGE_OUTSIDE_CBMEM if RELOCATABLE_RAMSTAGE + select CACHE_RELOCATED_RAMSTAGE_OUTSIDE_CBMEM select COLLECT_TIMESTAMPS select COMMON_FADT select CPU_INTEL_FIRMWARE_INTERFACE_TABLE @@ -47,8 +47,6 @@ config CPU_SPECIFIC_OPTIONS select PCIEXP_L1_SUB_STATE select PCIEX_LENGTH_64MB select REG_SCRIPT - select RELOCATABLE_MODULES - select RELOCATABLE_RAMSTAGE select RTC select SA_ENABLE_DPR select SMM_TSEG -- cgit v1.2.3