From 6c5efcd26856aef56dd88c231b6e9dc453e80f71 Mon Sep 17 00:00:00 2001 From: Werner Zeh Date: Fri, 11 Feb 2022 06:50:57 +0100 Subject: soc/intel/elkhartlake: Fix PCR ID for eSPI According to the Datasheet Volume 1 (doc #636112, [1]) the PCR port ID for eSPI is 0x72 (see chapter 25.2.2). Fix it in the header file. [1]: https://cdrdv2.intel.com/v1/dl/getContent/636112?explicitVersion=true Test=Read and modify PCR registers of eSPI controller. Change-Id: I5b07ef0f3a285f981791b1f4b4cdbda98ccf05ad Signed-off-by: Werner Zeh Reviewed-on: https://review.coreboot.org/c/coreboot/+/61841 Reviewed-by: Arthur Heymans Reviewed-by: Paul Menzel Tested-by: build bot (Jenkins) --- src/soc/intel/elkhartlake/include/soc/pcr_ids.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'src/soc/intel') diff --git a/src/soc/intel/elkhartlake/include/soc/pcr_ids.h b/src/soc/intel/elkhartlake/include/soc/pcr_ids.h index 20488e5b88..75862a6e0e 100644 --- a/src/soc/intel/elkhartlake/include/soc/pcr_ids.h +++ b/src/soc/intel/elkhartlake/include/soc/pcr_ids.h @@ -25,7 +25,7 @@ #define PID_PSF4 0xbd #define PID_RTC 0xc3 #define PID_ITSS 0xc4 -#define PID_ESPI 0xc7 +#define PID_ESPI 0x72 #define PID_SERIALIO 0xcb #endif -- cgit v1.2.3