From 6c191d8af41859dd94a01c6a868a9186d0120923 Mon Sep 17 00:00:00 2001 From: Aaron Durbin Date: Tue, 29 Nov 2016 21:22:42 -0600 Subject: romstage_handoff: add helper to determine resume status MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Instead of having callers query the romstage handoff resume status by inspecting the object themselves add romstage_handoff_is_resume() so that the same information can be queried easily. Change-Id: I40f3769b7646bf296ee4bc323a9ab1d5e5691e21 Signed-off-by: Aaron Durbin Reviewed-on: https://review.coreboot.org/17647 Tested-by: build bot (Jenkins) Reviewed-by: Kyösti Mälkki Reviewed-by: Furquan Shaikh --- src/soc/intel/apollolake/chip.c | 4 +--- src/soc/intel/quark/chip.c | 5 +---- src/soc/intel/skylake/chip_fsp20.c | 7 +------ 3 files changed, 3 insertions(+), 13 deletions(-) (limited to 'src/soc/intel') diff --git a/src/soc/intel/apollolake/chip.c b/src/soc/intel/apollolake/chip.c index ef5908cc36..32d68cc9ad 100644 --- a/src/soc/intel/apollolake/chip.c +++ b/src/soc/intel/apollolake/chip.c @@ -260,7 +260,6 @@ static void set_power_limits(void) static void soc_init(void *data) { struct global_nvs_t *gnvs; - struct romstage_handoff *handoff; /* Save VBT info and mapping */ vbt = vbt_get(&vbt_rdev); @@ -269,8 +268,7 @@ static void soc_init(void *data) * default policy that doesn't honor boards' requirements. */ itss_snapshot_irq_polarities(GPIO_IRQ_START, GPIO_IRQ_END); - handoff = romstage_handoff_find_or_add(); - fsp_silicon_init(handoff->s3_resume); + fsp_silicon_init(romstage_handoff_is_resume()); /* Restore GPIO IRQ polarities back to previous settings. */ itss_restore_irq_polarities(GPIO_IRQ_START, GPIO_IRQ_END); diff --git a/src/soc/intel/quark/chip.c b/src/soc/intel/quark/chip.c index 150df1272c..5e80463b0b 100644 --- a/src/soc/intel/quark/chip.c +++ b/src/soc/intel/quark/chip.c @@ -102,8 +102,6 @@ static const struct reg_script thermal_init_script[] = { static void chip_init(void *chip_info) { - struct romstage_handoff *handoff; - /* Validate the temperature settings */ ASSERT(PLATFORM_CATASTROPHIC_TRIP_CELSIUS <= 255); ASSERT(PLATFORM_CATASTROPHIC_TRIP_CELSIUS @@ -120,8 +118,7 @@ static void chip_init(void *chip_info) | TS_LOCK_AUX_TRIP_PT_REGS_ENABLE)); /* Perform silicon specific init. */ - handoff = romstage_handoff_find_or_add(); - fsp_silicon_init(handoff->s3_resume); + fsp_silicon_init(romstage_handoff_is_resume()); } static void pci_domain_set_resources(device_t dev) diff --git a/src/soc/intel/skylake/chip_fsp20.c b/src/soc/intel/skylake/chip_fsp20.c index f096cf97e7..a1e76a9d39 100644 --- a/src/soc/intel/skylake/chip_fsp20.c +++ b/src/soc/intel/skylake/chip_fsp20.c @@ -35,13 +35,8 @@ void soc_init_pre_device(void *chip_info) { - struct romstage_handoff *handoff; - - /* Get S3 status to pass to silicon init. */ - handoff = romstage_handoff_find_or_add(); - /* Perform silicon specific init. */ - fsp_silicon_init(handoff->s3_resume); + fsp_silicon_init(romstage_handoff_is_resume()); } static void pci_domain_set_resources(device_t dev) -- cgit v1.2.3