From 5a1f9a87cb2f6a3e0699f3d13db41c7da2963b88 Mon Sep 17 00:00:00 2001 From: Aaron Durbin Date: Thu, 7 Sep 2017 21:17:33 -0600 Subject: cpu/x86/mp_init: remove adjust_cpu_apic_entry() The original purpose of adjust_cpu_apic_entry() was to set up an APIC map. That map was effectively only used for mapping *default* APIC id to CPU number in the SMM handler. The normal AP startup path didn't need this mapping because it was whoever won the race got the next cpu number. Instead of statically calculating (and wrong) just initialize the default APIC id map when the APs come online. Once the APs are online the SMM handler is loaded and the mapping is utilized. Change-Id: Idff3b8cfc17aef0729d3193b4499116a013b7930 Signed-off-by: Aaron Durbin Reviewed-on: https://review.coreboot.org/21452 Tested-by: build bot (Jenkins) Reviewed-by: Furquan Shaikh Reviewed-by: Subrata Banik Reviewed-by: Marshall Dawson --- src/soc/intel/baytrail/cpu.c | 7 ------- src/soc/intel/braswell/cpu.c | 7 ------- src/soc/intel/broadwell/cpu.c | 12 ------------ src/soc/intel/cannonlake/cpu.c | 11 ----------- src/soc/intel/fsp_baytrail/cpu.c | 7 ------- src/soc/intel/skylake/cpu.c | 11 ----------- 6 files changed, 55 deletions(-) (limited to 'src/soc/intel') diff --git a/src/soc/intel/baytrail/cpu.c b/src/soc/intel/baytrail/cpu.c index 94c3f2b39e..a3844047c4 100644 --- a/src/soc/intel/baytrail/cpu.c +++ b/src/soc/intel/baytrail/cpu.c @@ -151,12 +151,6 @@ static void get_smm_info(uintptr_t *perm_smbase, size_t *perm_smsize, *smm_save_state_size = sizeof(em64t100_smm_state_save_area_t); } -/* The APIC id space on Bay Trail is sparse. Each id is separated by 2. */ -static int adjust_apic_id(int index, int apic_id) -{ - return 2 * index; -} - static void get_microcode_info(const void **microcode, int *parallel) { const struct pattrs *pattrs = pattrs_get(); @@ -199,7 +193,6 @@ static const struct mp_ops mp_ops = { .get_cpu_count = get_cpu_count, .get_smm_info = get_smm_info, .get_microcode_info = get_microcode_info, - .adjust_cpu_apic_entry = adjust_apic_id, .pre_mp_smm_init = southcluster_smm_clear_state, .per_cpu_smm_trigger = per_cpu_smm_trigger, .relocation_handler = relocation_handler, diff --git a/src/soc/intel/braswell/cpu.c b/src/soc/intel/braswell/cpu.c index 96c823a537..a2bd180da5 100644 --- a/src/soc/intel/braswell/cpu.c +++ b/src/soc/intel/braswell/cpu.c @@ -161,12 +161,6 @@ static void get_smm_info(uintptr_t *perm_smbase, size_t *perm_smsize, *smm_save_state_size = sizeof(em64t100_smm_state_save_area_t); } -/* The APIC id space on Bay Trail is sparse. Each id is separated by 2. */ -static int adjust_apic_id(int index, int apic_id) -{ - return 2 * index; -} - static void get_microcode_info(const void **microcode, int *parallel) { const struct pattrs *pattrs = pattrs_get(); @@ -215,7 +209,6 @@ static const struct mp_ops mp_ops = { .get_cpu_count = get_cpu_count, .get_smm_info = get_smm_info, .get_microcode_info = get_microcode_info, - .adjust_cpu_apic_entry = adjust_apic_id, .pre_mp_smm_init = southcluster_smm_clear_state, .per_cpu_smm_trigger = per_cpu_smm_trigger, .relocation_handler = relocation_handler, diff --git a/src/soc/intel/broadwell/cpu.c b/src/soc/intel/broadwell/cpu.c index b4db21b6a2..7b56db17fc 100644 --- a/src/soc/intel/broadwell/cpu.c +++ b/src/soc/intel/broadwell/cpu.c @@ -605,7 +605,6 @@ static void cpu_core_init(device_t cpu) /* MP initialization support. */ static const void *microcode_patch; -static int ht_disabled; static void pre_mp_init(void) { @@ -630,8 +629,6 @@ static int get_cpu_count(void) printk(BIOS_DEBUG, "CPU has %u cores, %u threads enabled.\n", num_cores, num_threads); - ht_disabled = num_threads == num_cores; - return num_threads; } @@ -642,14 +639,6 @@ static void get_microcode_info(const void **microcode, int *parallel) *parallel = 1; } -static int adjust_apic_id(int index, int apic_id) -{ - if (ht_disabled) - return 2 * index; - else - return index; -} - static void per_cpu_smm_trigger(void) { /* Relocate the SMM handler. */ @@ -677,7 +666,6 @@ static const struct mp_ops mp_ops = { .get_cpu_count = get_cpu_count, .get_smm_info = smm_info, .get_microcode_info = get_microcode_info, - .adjust_cpu_apic_entry = adjust_apic_id, .pre_mp_smm_init = smm_initialize, .per_cpu_smm_trigger = per_cpu_smm_trigger, .relocation_handler = smm_relocation_handler, diff --git a/src/soc/intel/cannonlake/cpu.c b/src/soc/intel/cannonlake/cpu.c index 2faadfd492..4e065778fa 100644 --- a/src/soc/intel/cannonlake/cpu.c +++ b/src/soc/intel/cannonlake/cpu.c @@ -200,16 +200,6 @@ void soc_core_init(device_t cpu) } -static int adjust_apic_id(int index, int apic_id) -{ - unsigned int num_cores, num_threads; - - if (cpu_read_topology(&num_cores, &num_threads)) - return 2 * index; - else - return index; -} - static void post_mp_init(void) { /* Set Max Ratio */ @@ -225,7 +215,6 @@ static const struct mp_ops mp_ops = { .pre_mp_init = soc_fsp_load, .get_cpu_count = get_cpu_count, .get_microcode_info = get_microcode_info, - .adjust_cpu_apic_entry = adjust_apic_id, .post_mp_init = post_mp_init, }; diff --git a/src/soc/intel/fsp_baytrail/cpu.c b/src/soc/intel/fsp_baytrail/cpu.c index 742b2ef794..c3879e1f95 100644 --- a/src/soc/intel/fsp_baytrail/cpu.c +++ b/src/soc/intel/fsp_baytrail/cpu.c @@ -122,12 +122,6 @@ static void get_smm_info(uintptr_t *perm_smbase, size_t *perm_smsize, *smm_save_state_size = sizeof(em64t100_smm_state_save_area_t); } -/* The APIC id space on Bay Trail is sparse. Each id is separated by 2. */ -static int adjust_apic_id(int index, int apic_id) -{ - return 2 * index; -} - static void get_microcode_info(const void **microcode, int *parallel) { const struct pattrs *pattrs = pattrs_get(); @@ -165,7 +159,6 @@ static const struct mp_ops mp_ops = { .get_cpu_count = get_cpu_count, .get_smm_info = get_smm_info, .get_microcode_info = get_microcode_info, - .adjust_cpu_apic_entry = adjust_apic_id, .pre_mp_smm_init = southcluster_smm_clear_state, .relocation_handler = relocation_handler, .post_mp_init = enable_smis, diff --git a/src/soc/intel/skylake/cpu.c b/src/soc/intel/skylake/cpu.c index 0ad5dc9a72..1e12c6509f 100644 --- a/src/soc/intel/skylake/cpu.c +++ b/src/soc/intel/skylake/cpu.c @@ -421,16 +421,6 @@ void soc_core_init(device_t cpu) prmrr_core_configure(); } -static int adjust_apic_id(int index, int apic_id) -{ - unsigned int num_cores, num_threads; - - if (cpu_read_topology(&num_cores, &num_threads)) - return 2 * index; - else - return index; -} - static void per_cpu_smm_trigger(void) { /* Relocate the SMM handler. */ @@ -466,7 +456,6 @@ static const struct mp_ops mp_ops = { .get_cpu_count = get_cpu_count, .get_smm_info = smm_info, .get_microcode_info = get_microcode_info, - .adjust_cpu_apic_entry = adjust_apic_id, .pre_mp_smm_init = smm_initialize, .per_cpu_smm_trigger = per_cpu_smm_trigger, .relocation_handler = smm_relocation_handler, -- cgit v1.2.3