From 59609784f0fc36296fc198228b912e7609c8a3e9 Mon Sep 17 00:00:00 2001 From: Tim Crawford Date: Wed, 25 May 2022 12:36:47 -0600 Subject: soc/intel/tgl: Add PEG devices to PCI constraints Based on the constraints for CML. Fixes the following warnings in Linux on system76/oryp8 and system76/gaze16, which have an NVIDIA GPU on the bridge. pcieport 0000:00:01.0: can't derive routing for PCI INT A pcieport 0000:00:01.0: can't derive routing for PCI INT B This, in turn, resolves an IRQ conflict with the PCH HDA device that would cause a stack trace on every boot and on S3 suspend. irq 10: nobody cared (try booting with the "irqpoll" option) [<00000000fb84c354>] azx_interrupt [snd_hda_codec] Disabling IRQ #10 Change-Id: Ibc968aaa7bf0259879097ff69d2543dcfa2e5e4b Signed-off-by: Tim Crawford Reviewed-on: https://review.coreboot.org/c/coreboot/+/64671 Tested-by: build bot (Jenkins) Reviewed-by: Tim Wawrzynczak --- src/soc/intel/tigerlake/fsp_params.c | 8 ++++++++ 1 file changed, 8 insertions(+) (limited to 'src/soc/intel') diff --git a/src/soc/intel/tigerlake/fsp_params.c b/src/soc/intel/tigerlake/fsp_params.c index 1cf3d2fee8..e3c7879902 100644 --- a/src/soc/intel/tigerlake/fsp_params.c +++ b/src/soc/intel/tigerlake/fsp_params.c @@ -93,6 +93,14 @@ static void parse_devicetree(FSP_S_CONFIG *params) * regardless of whether or not they are used by the mainboard. */ static const struct slot_irq_constraints irq_constraints[] = { + { + .slot = SA_DEV_SLOT_PEG, + .fns = { + FIXED_INT_PIRQ(SA_DEVFN_PEG1, PCI_INT_A, PIRQ_A), + FIXED_INT_PIRQ(SA_DEVFN_PEG2, PCI_INT_B, PIRQ_B), + FIXED_INT_PIRQ(SA_DEVFN_PEG3, PCI_INT_C, PIRQ_C), + }, + }, { .slot = SA_DEV_SLOT_IGD, .fns = { -- cgit v1.2.3