From 42fa6247f41eb920f069f21709c8267512d69220 Mon Sep 17 00:00:00 2001 From: Shuo Liu Date: Thu, 21 Mar 2024 00:43:10 +0800 Subject: soc/intel/xeon_sp: Remove PAM unlock operations unlock_pam_regions routes Programmable Attribute Map (PAM) access to DRAM. In SPR, PAM routing to DRAM is covered by FSP. Move the step to SoC specific codes. TEST=intel/archercity CRB Change-Id: I3fd1d806807449e6a4d9d4d2c8a47ce61ed53018 Signed-off-by: Shuo Liu Reviewed-on: https://review.coreboot.org/c/coreboot/+/81349 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Rudolph --- src/soc/intel/xeon_sp/cpx/chip.c | 24 ++++++++++++++++++++++++ src/soc/intel/xeon_sp/include/soc/util.h | 1 - src/soc/intel/xeon_sp/romstage.c | 2 -- src/soc/intel/xeon_sp/skx/chip.c | 27 +++++++++++++++++++++++++++ src/soc/intel/xeon_sp/util.c | 22 ---------------------- 5 files changed, 51 insertions(+), 25 deletions(-) (limited to 'src/soc/intel') diff --git a/src/soc/intel/xeon_sp/cpx/chip.c b/src/soc/intel/xeon_sp/cpx/chip.c index 1fc9c7530b..b0e61b62ae 100644 --- a/src/soc/intel/xeon_sp/cpx/chip.c +++ b/src/soc/intel/xeon_sp/cpx/chip.c @@ -161,8 +161,32 @@ static void chip_final(void *data) set_bios_init_completion(); } +/* Only call this code from socket0! */ +static void unlock_pam_regions(void) +{ + uint32_t pam0123_unlock_dram = 0x33333330; + uint32_t pam456_unlock_dram = 0x00333333; + /* Get UBOX(1) for socket0 */ + uint32_t bus1 = socket0_get_ubox_busno(PCU_IIO_STACK); + + /* Assume socket0 owns PCI segment 0 */ + pci_io_write_config32(PCI_DEV(bus1, SAD_ALL_DEV, SAD_ALL_FUNC), + SAD_ALL_PAM0123_CSR, pam0123_unlock_dram); + pci_io_write_config32(PCI_DEV(bus1, SAD_ALL_DEV, SAD_ALL_FUNC), + SAD_ALL_PAM456_CSR, pam456_unlock_dram); + + uint32_t reg1 = pci_io_read_config32(PCI_DEV(bus1, SAD_ALL_DEV, + SAD_ALL_FUNC), SAD_ALL_PAM0123_CSR); + uint32_t reg2 = pci_io_read_config32(PCI_DEV(bus1, SAD_ALL_DEV, + SAD_ALL_FUNC), SAD_ALL_PAM456_CSR); + printk(BIOS_DEBUG, "%s:%s pam0123_csr: 0x%x, pam456_csr: 0x%x\n", + __FILE__, __func__, reg1, reg2); +} + static void chip_init(void *data) { + unlock_pam_regions(); + printk(BIOS_DEBUG, "coreboot: calling fsp_silicon_init\n"); fsp_silicon_init(); diff --git a/src/soc/intel/xeon_sp/include/soc/util.h b/src/soc/intel/xeon_sp/include/soc/util.h index 5904b16138..177d6d50e3 100644 --- a/src/soc/intel/xeon_sp/include/soc/util.h +++ b/src/soc/intel/xeon_sp/include/soc/util.h @@ -9,7 +9,6 @@ #define MEM_ADDR_64MB_SHIFT_BITS 26 void lock_pam0123(void); -void unlock_pam_regions(void); msr_t read_msr_ppin(void); int get_platform_thread_count(void); diff --git a/src/soc/intel/xeon_sp/romstage.c b/src/soc/intel/xeon_sp/romstage.c index 9084f2ae24..8af5dd8173 100644 --- a/src/soc/intel/xeon_sp/romstage.c +++ b/src/soc/intel/xeon_sp/romstage.c @@ -24,8 +24,6 @@ void mainboard_romstage_entry(void) } } - unlock_pam_regions(); - save_dimm_info(); } diff --git a/src/soc/intel/xeon_sp/skx/chip.c b/src/soc/intel/xeon_sp/skx/chip.c index d8b31617e5..fe16e058a1 100644 --- a/src/soc/intel/xeon_sp/skx/chip.c +++ b/src/soc/intel/xeon_sp/skx/chip.c @@ -3,6 +3,9 @@ #include #include #include +#include +#include +#include #include #include #include @@ -35,8 +38,32 @@ static void soc_enable_dev(struct device *dev) } } +/* Only call this code from socket0! */ +static void unlock_pam_regions(void) +{ + uint32_t pam0123_unlock_dram = 0x33333330; + uint32_t pam456_unlock_dram = 0x00333333; + /* Get UBOX(1) for socket0 */ + uint32_t bus1 = socket0_get_ubox_busno(PCU_IIO_STACK); + + /* Assume socket0 owns PCI segment 0 */ + pci_io_write_config32(PCI_DEV(bus1, SAD_ALL_DEV, SAD_ALL_FUNC), + SAD_ALL_PAM0123_CSR, pam0123_unlock_dram); + pci_io_write_config32(PCI_DEV(bus1, SAD_ALL_DEV, SAD_ALL_FUNC), + SAD_ALL_PAM456_CSR, pam456_unlock_dram); + + uint32_t reg1 = pci_io_read_config32(PCI_DEV(bus1, SAD_ALL_DEV, + SAD_ALL_FUNC), SAD_ALL_PAM0123_CSR); + uint32_t reg2 = pci_io_read_config32(PCI_DEV(bus1, SAD_ALL_DEV, + SAD_ALL_FUNC), SAD_ALL_PAM456_CSR); + printk(BIOS_DEBUG, "%s:%s pam0123_csr: 0x%x, pam456_csr: 0x%x\n", + __FILE__, __func__, reg1, reg2); +} + static void soc_init(void *data) { + unlock_pam_regions(); + printk(BIOS_DEBUG, "coreboot: calling fsp_silicon_init\n"); fsp_silicon_init(); diff --git a/src/soc/intel/xeon_sp/util.c b/src/soc/intel/xeon_sp/util.c index b3ee02b1e7..81dc77db80 100644 --- a/src/soc/intel/xeon_sp/util.c +++ b/src/soc/intel/xeon_sp/util.c @@ -17,28 +17,6 @@ #include #include -/* Only call this code from socket0! */ -void unlock_pam_regions(void) -{ - uint32_t pam0123_unlock_dram = 0x33333330; - uint32_t pam456_unlock_dram = 0x00333333; - /* Get UBOX(1) for socket0 */ - uint32_t bus1 = socket0_get_ubox_busno(PCU_IIO_STACK); - - /* Assume socket0 owns PCI segment 0 */ - pci_io_write_config32(PCI_DEV(bus1, SAD_ALL_DEV, SAD_ALL_FUNC), - SAD_ALL_PAM0123_CSR, pam0123_unlock_dram); - pci_io_write_config32(PCI_DEV(bus1, SAD_ALL_DEV, SAD_ALL_FUNC), - SAD_ALL_PAM456_CSR, pam456_unlock_dram); - - uint32_t reg1 = pci_io_read_config32(PCI_DEV(bus1, SAD_ALL_DEV, - SAD_ALL_FUNC), SAD_ALL_PAM0123_CSR); - uint32_t reg2 = pci_io_read_config32(PCI_DEV(bus1, SAD_ALL_DEV, - SAD_ALL_FUNC), SAD_ALL_PAM456_CSR); - printk(BIOS_DEBUG, "%s:%s pam0123_csr: 0x%x, pam456_csr: 0x%x\n", - __FILE__, __func__, reg1, reg2); -} - msr_t read_msr_ppin(void) { msr_t ppin = {0}; -- cgit v1.2.3