From 4095291808b04544346432ca675e6fbfbb7ed11c Mon Sep 17 00:00:00 2001 From: Tyler Wang Date: Mon, 13 Sep 2021 15:18:13 +0800 Subject: src/soc/intel/jasperlake/spd: Update SPDs Due to CL:55000 modified MT53E1G32D2NP-046 WT:B settings and CL:56597 add new memory in global_lp4x_mem_parts.json.txt, update SPDs using gen_spd.go for JSL: Modify: 1.MT53E1G32D2NP-046 WT:B(lp4x-spd-5.hex --> lp4x-spd-3.hex) Add: 1.H54G46CYRBX267,lp4x-spd-1.hex 2.H54G56CYRBX247,lp4x-spd-3.hex 3.K4U6E3S4AB-MGCL,lp4x-spd-1.hex 4.K4UBE3D4AB-MGCL,lp4x-spd-3.hex BUG=b:199032134 TEST=emerge-dedede coreboot Signed-off-by: Tyler Wang Change-Id: I45b9275403fc4166fc56ae4c368c7a222141e150 Reviewed-on: https://review.coreboot.org/c/coreboot/+/57587 Tested-by: build bot (Jenkins) Reviewed-by: Furquan Shaikh Reviewed-by: Karthik Ramasubramanian --- src/soc/intel/jasperlake/spd/lp4x_spd_manifest.generated.txt | 6 +++++- 1 file changed, 5 insertions(+), 1 deletion(-) (limited to 'src/soc/intel') diff --git a/src/soc/intel/jasperlake/spd/lp4x_spd_manifest.generated.txt b/src/soc/intel/jasperlake/spd/lp4x_spd_manifest.generated.txt index d2df7df39d..e12608d2a5 100644 --- a/src/soc/intel/jasperlake/spd/lp4x_spd_manifest.generated.txt +++ b/src/soc/intel/jasperlake/spd/lp4x_spd_manifest.generated.txt @@ -3,7 +3,7 @@ H9HCNNNFAMMLXR-NEE,lp4x-spd-2.hex K4U6E3S4AA-MGCL,lp4x-spd-1.hex K4UBE3D4AA-MGCL,lp4x-spd-3.hex MT53E1G32D2NP-046 WT:A,lp4x-spd-4.hex -MT53E1G32D2NP-046 WT:B,lp4x-spd-5.hex +MT53E1G32D2NP-046 WT:B,lp4x-spd-3.hex H9HKNNNCRMBVAR-NEH,lp4x-spd-5.hex MT53E1G64D4SQ-046 WT:A,lp4x-spd-6.hex MT53E512M32D2NP-046 WT:F,lp4x-spd-1.hex @@ -22,3 +22,7 @@ NT6AP256T32AV-J1,lp4x-spd-9.hex MT53E1G32D4NQ-046 WT:E,lp4x-spd-3.hex MT53E2G32D4NQ-046 WT:A,lp4x-spd-10.hex MT53E512M32D1NP-046 WT:B,lp4x-spd-1.hex +H54G46CYRBX267,lp4x-spd-1.hex +H54G56CYRBX247,lp4x-spd-3.hex +K4U6E3S4AB-MGCL,lp4x-spd-1.hex +K4UBE3D4AB-MGCL,lp4x-spd-3.hex -- cgit v1.2.3