From 3b6b9c7b783f2005952c1521dba30fd5b598e68e Mon Sep 17 00:00:00 2001 From: Furquan Shaikh Date: Tue, 19 Jan 2021 11:55:08 -0800 Subject: soc/intel/common/pcie_rp.h: Fix comment style This change updates pcie_rp.h to reflow the comment blocks to fit within 80 columns to match the original style of the file. This addresses comment received on CB:49370 (https://review.coreboot.org/c/coreboot/+/49370/comment/0f3fe10d_4e218b5f/). Change-Id: I565ad602e0e3a2ee09e8345479d82e2ce0a31fd0 Signed-off-by: Furquan Shaikh Reviewed-on: https://review.coreboot.org/c/coreboot/+/49725 Tested-by: build bot (Jenkins) Reviewed-by: HAOUAS Elyes Reviewed-by: EricR Lai --- .../common/block/include/intelblocks/pcie_rp.h | 28 +++++++++++----------- 1 file changed, 14 insertions(+), 14 deletions(-) (limited to 'src/soc/intel') diff --git a/src/soc/intel/common/block/include/intelblocks/pcie_rp.h b/src/soc/intel/common/block/include/intelblocks/pcie_rp.h index 2030e72453..d51b1f1c26 100644 --- a/src/soc/intel/common/block/include/intelblocks/pcie_rp.h +++ b/src/soc/intel/common/block/include/intelblocks/pcie_rp.h @@ -10,10 +10,10 @@ * functions. * * `slot` is the PCI device/slot number of such a group. - * `start` is the initial PCI function number within the group. This is useful in case the - * root port numbers are not contiguous within the slot. - * `count` is the number of functions within the group starting with the `start` function - * number. + * `start` is the initial PCI function number within the group. This is useful + * in case the root port numbers are not contiguous within the slot. + * `count` is the number of functions within the group starting with the `start` + * function number. */ struct pcie_rp_group { unsigned int slot; @@ -44,22 +44,22 @@ static inline unsigned int rp_end_fn(const struct pcie_rp_group *group) * Call this once, after root ports have been reordered, but before PCI * enumeration. * - * `groups` points to a list of groups terminated by an entry with `count == 0`. It is assumed - * that the first group includes the RPs 1 to the first group's `count` and that adjacent groups - * follow without gaps in the numbering. + * `groups` points to a list of groups terminated by an entry with `count == 0`. + * It is assumed that the first group includes the RPs 1 to the first group's + * `count` and that adjacent groups follow without gaps in the numbering. */ void pcie_rp_update_devicetree(const struct pcie_rp_group *groups); /* - * Return mask of PCIe root ports that are enabled by mainboard. Mask is set in the same order - * as the root ports in pcie_rp_group groups table. + * Return mask of PCIe root ports that are enabled by mainboard. Mask is set in + * the same order as the root ports in pcie_rp_group groups table. * - * Thus, the status of first root port in the groups table is indicated by bit 0 in the returned - * mask, second root port by bit 1 and so on. + * Thus, the status of first root port in the groups table is indicated by bit 0 + * in the returned mask, second root port by bit 1 and so on. - * 1 in the bit position indicates root port is enabled, whereas 0 indicates root port is - * disabled. This function assumes that the maximum count of root ports in the groups table is - * <= 32. + * 1 in the bit position indicates root port is enabled, whereas 0 indicates root + * port is disabled. This function assumes that the maximum count of root ports + * in the groups table is <= 32. */ uint32_t pcie_rp_enable_mask(const struct pcie_rp_group *groups); -- cgit v1.2.3