From 3549462a95c5d7b9450924a1c0ca54b992c81211 Mon Sep 17 00:00:00 2001 From: Aaron Durbin Date: Wed, 15 Jan 2014 11:59:10 -0600 Subject: baytrail: enable graphics turbo Though the limited documentation indicates the default is 0 for the gfx_turbo_disable bit, in practice that isn't true. Knock down the gfs_turbo_disable bit to enable graphics turbo mode. BUG=chrome-os-partner:25044 BRANCH=baytrail TEST=Built and booted. Added debug code to output SB_BIOS_CONFIG. Noted that bit 7 was set to 0. Change-Id: I11210c6a0b29765cb709a54d6ebd94211538807b Signed-off-by: Aaron Durbin Reviewed-on: https://chromium-review.googlesource.com/182640 Reviewed-by: Duncan Laurie Reviewed-on: http://review.coreboot.org/5050 Reviewed-by: Paul Menzel Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi --- src/soc/intel/baytrail/gfx.c | 4 ++++ 1 file changed, 4 insertions(+) (limited to 'src/soc/intel') diff --git a/src/soc/intel/baytrail/gfx.c b/src/soc/intel/baytrail/gfx.c index 6f78daca36..4ed08c93a3 100644 --- a/src/soc/intel/baytrail/gfx.c +++ b/src/soc/intel/baytrail/gfx.c @@ -212,6 +212,10 @@ static const struct reg_script gfx_init_script[] = { REG_RES_WRITE32(PCI_BASE_ADDRESS_0, 0x9404, 0), REG_RES_WRITE32(PCI_BASE_ADDRESS_0, 0x9408, 0), REG_RES_WRITE32(PCI_BASE_ADDRESS_0, 0x940c, 0), + + /* Enable Gfx Turbo. */ + REG_IOSF_RMW(IOSF_PORT_PMC, SB_BIOS_CONFIG, + ~SB_BIOS_CONFIG_GFX_TURBO_DIS, 0), REG_SCRIPT_END }; -- cgit v1.2.3