From 2c9d65b51b9ed5af092434d1172a43628ef068d5 Mon Sep 17 00:00:00 2001
From: V Sowmya <v.sowmya@intel.com>
Date: Thu, 3 Dec 2020 23:15:37 +0530
Subject: soc/intel/common/block/usb4: Add the PCI ID for ADL

This patch adds the PCI device ID for Alderlake
CPU xHCI.

Change-Id: I4074a81aa9be2ef3a0956da08bece32a613415ab
Signed-off-by: V Sowmya <v.sowmya@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/48271
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Furquan Shaikh <furquan@google.com>
Reviewed-by: Subrata Banik <subrata.banik@intel.com>
---
 src/soc/intel/common/block/usb4/xhci.c | 1 +
 1 file changed, 1 insertion(+)

(limited to 'src/soc/intel')

diff --git a/src/soc/intel/common/block/usb4/xhci.c b/src/soc/intel/common/block/usb4/xhci.c
index 4fe60dd91a..d4fb3e2432 100644
--- a/src/soc/intel/common/block/usb4/xhci.c
+++ b/src/soc/intel/common/block/usb4/xhci.c
@@ -27,6 +27,7 @@ static struct device_operations usb4_xhci_ops = {
 
 static const unsigned short pci_device_ids[] = {
 	PCI_DEVICE_ID_INTEL_TGP_TCSS_XHCI,
+	PCI_DEVICE_ID_INTEL_ADP_TCSS_XHCI,
 	0
 };
 
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