From 1ff0f54f03ed0ebfd4c827bc11e31bc8309828ce Mon Sep 17 00:00:00 2001
From: Divya Sasidharan <divya.s.sasidharan@intel.com>
Date: Sun, 11 Oct 2015 11:22:21 -0700
Subject: soc/braswell: Add CPUID for D0 stepping

Original-Reviewed-on: https://chromium-review.googlesource.com/309122
Original-Reviewed-by: Duncan Laurie <dlaurie@chromium.org>
Original-Tested-by: Hannah Williams <hannah.williams@intel.com>

Change-Id: Ia24dbeb6b23ccbbb380843a4684def578cde168a
Signed-off-by: Divya Sasidharan <divya.s.sasidharan@intel.com>
Reviewed-on: https://review.coreboot.org/12727
Tested-by: build bot (Jenkins)
Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
Reviewed-by: Martin Roth <martinroth@google.com>
---
 src/soc/intel/braswell/cpu.c | 1 +
 1 file changed, 1 insertion(+)

(limited to 'src/soc/intel')

diff --git a/src/soc/intel/braswell/cpu.c b/src/soc/intel/braswell/cpu.c
index 04c83847af..feb9d9b84a 100644
--- a/src/soc/intel/braswell/cpu.c
+++ b/src/soc/intel/braswell/cpu.c
@@ -149,6 +149,7 @@ static struct device_operations cpu_dev_ops = {
 };
 
 static struct cpu_device_id cpu_table[] = {
+	{ X86_VENDOR_INTEL, 0x406C4 },
 	{ X86_VENDOR_INTEL, 0x406C3 },
 	{ X86_VENDOR_INTEL, 0x406C2 },
 	{ 0, 0 },
-- 
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