From 197cfe03d559edbf884be81a0a121e20c4b0c63a Mon Sep 17 00:00:00 2001 From: Sean Rhodes Date: Thu, 28 Jul 2022 21:35:35 +0100 Subject: soc/intel/apollolake/acpi: Tidy the PCI Memory Region Signed-off-by: Sean Rhodes Change-Id: I8997f9c111142a908b60675023d1a7dd86d3632a Reviewed-on: https://review.coreboot.org/c/coreboot/+/66238 Reviewed-by: Matt DeVillier Tested-by: build bot (Jenkins) --- src/soc/intel/apollolake/acpi/northbridge.asl | 9 ++++++--- 1 file changed, 6 insertions(+), 3 deletions(-) (limited to 'src/soc/intel') diff --git a/src/soc/intel/apollolake/acpi/northbridge.asl b/src/soc/intel/apollolake/acpi/northbridge.asl index aa45f45fa9..2437a1b545 100644 --- a/src/soc/intel/apollolake/acpi/northbridge.asl +++ b/src/soc/intel/apollolake/acpi/northbridge.asl @@ -72,11 +72,14 @@ Method (_CRS, 0, Serialized) 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,,, PM01) - /* PCI Memory Region (TOUUD - (TOUUD + ABOVE_4G_MMIO_SIZE)) */ + /* + * PCI Memory Region above 4 GiB + * (TOUUD - (TOUUD + ABOVE_4G_MMIO_SIZE)) + */ QWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, NonCacheable, ReadWrite, - 0x00000000, 0x10000, 0x1ffff, 0x00000000, - 0x10000,,, PM02) + 0x00000000, 0x00010000, 0x0001ffff, 0x00000000, + 0x00010000,,, PM02) }) /* Find PCI resource area in MCRS */ -- cgit v1.2.3