From 85610d8d86de10cdb8c82b61290501ee0b3cf742 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Michael=20Niew=C3=B6hner?= Date: Mon, 23 Nov 2020 22:02:20 +0100 Subject: soc/intel/{xeon-sp,icl,tgl,jsl,ehl}: add NMI_{EN,STS} registers MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Add NMI_EN and NMI_STS registers, so NMI interrupts can be used. References: - XEON-SP: Intel doc# 633935-005 and 547817 rev1.5 - ICL-LP: Intel doc# 341081-002 - TGL-LP: Intel doc# 631120-001 - TGL-H: Intel doc# 636174-002 - JSL: Intel doc# 634545-001 - EHL: Intel doc# 636722-002 Signed-off-by: Michael Niewöhner Change-Id: I2621f4495dfd4f95f9774d9081e44c604de830a1 Reviewed-on: https://review.coreboot.org/c/coreboot/+/48102 Tested-by: build bot (Jenkins) Reviewed-by: Tim Wawrzynczak Reviewed-by: Lance Zhao --- src/soc/intel/xeon_sp/gpio.c | 6 ++++++ src/soc/intel/xeon_sp/include/soc/lewisburg_pch_gpio_defs.h | 2 ++ 2 files changed, 8 insertions(+) (limited to 'src/soc/intel/xeon_sp') diff --git a/src/soc/intel/xeon_sp/gpio.c b/src/soc/intel/xeon_sp/gpio.c index 5f75991e76..7fd7a3ed87 100644 --- a/src/soc/intel/xeon_sp/gpio.c +++ b/src/soc/intel/xeon_sp/gpio.c @@ -62,6 +62,8 @@ static const struct pad_community lewisburg_gpio_communities[] = { .gpi_int_en_reg_0 = GPI_INT_EN_0, .gpi_smi_sts_reg_0 = GPI_SMI_STS_0, .gpi_smi_en_reg_0 = GPI_SMI_EN_0, + .gpi_nmi_sts_reg_0 = GPI_NMI_STS_0, + .gpi_nmi_en_reg_0 = GPI_NMI_EN_0, .max_pads_per_group = GPIO_MAX_NUM_PER_GROUP, .name = "GPIO_COM0", .acpi_path = "\\_SB.PCI0.GPIO", @@ -81,6 +83,8 @@ static const struct pad_community lewisburg_gpio_communities[] = { .gpi_int_en_reg_0 = GPI_INT_EN_0, .gpi_smi_sts_reg_0 = GPI_SMI_STS_0, .gpi_smi_en_reg_0 = GPI_SMI_EN_0, + .gpi_nmi_sts_reg_0 = GPI_NMI_STS_0, + .gpi_nmi_en_reg_0 = GPI_NMI_EN_0, .max_pads_per_group = GPIO_MAX_NUM_PER_GROUP, .name = "GPIO_COM1", .acpi_path = "\\_SB.PCI0.GPIO", @@ -100,6 +104,8 @@ static const struct pad_community lewisburg_gpio_communities[] = { .gpi_int_en_reg_0 = GPI_INT_EN_0, .gpi_smi_sts_reg_0 = GPI_SMI_STS_0, .gpi_smi_en_reg_0 = GPI_SMI_EN_0, + .gpi_nmi_sts_reg_0 = GPI_NMI_STS_0, + .gpi_nmi_en_reg_0 = GPI_NMI_EN_0, .max_pads_per_group = GPIO_MAX_NUM_PER_GROUP, .name = "GPIO_COM3", .acpi_path = "\\_SB.PCI0.GPIO", diff --git a/src/soc/intel/xeon_sp/include/soc/lewisburg_pch_gpio_defs.h b/src/soc/intel/xeon_sp/include/soc/lewisburg_pch_gpio_defs.h index 8c37a843ad..2ad5fba38b 100644 --- a/src/soc/intel/xeon_sp/include/soc/lewisburg_pch_gpio_defs.h +++ b/src/soc/intel/xeon_sp/include/soc/lewisburg_pch_gpio_defs.h @@ -662,5 +662,7 @@ #define GPI_INT_EN_0 0x120 #define GPI_SMI_STS_0 0x180 #define GPI_SMI_EN_0 0x1a0 +#define GPI_NMI_STS_0 0x160 +#define GPI_NMI_EN_0 0x170 #endif /* LEWISBURG_GPIO_DEFS_H */ -- cgit v1.2.3