From 401ec98e067985431e8e263f7eecef31348d785c Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Ky=C3=B6sti=20M=C3=A4lkki?= Date: Sun, 6 Jun 2021 08:27:15 +0300 Subject: arch/x86/ioapic: Add get_ioapic_id() and get_ioapic_version() MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Change-Id: I4ad080653c9af94a4dc73d93ddc4c8c117a682b9 Signed-off-by: Kyösti Mälkki Reviewed-on: https://review.coreboot.org/c/coreboot/+/55282 Tested-by: build bot (Jenkins) Reviewed-by: Furquan Shaikh Reviewed-by: Angel Pons --- src/soc/intel/xeon_sp/lpc.c | 5 +---- 1 file changed, 1 insertion(+), 4 deletions(-) (limited to 'src/soc/intel/xeon_sp') diff --git a/src/soc/intel/xeon_sp/lpc.c b/src/soc/intel/xeon_sp/lpc.c index dad0a4914d..7b46564588 100644 --- a/src/soc/intel/xeon_sp/lpc.c +++ b/src/soc/intel/xeon_sp/lpc.c @@ -1,7 +1,6 @@ /* SPDX-License-Identifier: GPL-2.0-or-later */ #include -#include #include #include #include @@ -23,9 +22,7 @@ void lpc_soc_init(struct device *dev) printk(BIOS_SPEW, "pch: lpc_init\n"); /* FSP configures IOAPIC and PCHInterrupt Config */ - printk(BIOS_SPEW, "IOAPICID 0x%x, 0x%x\n", - io_apic_read((void *)IO_APIC_ADDR, 0x00), - ((io_apic_read((void *)IO_APIC_ADDR, 0x00) & 0x0f000000) >> 24)); + /* Should read back the ID to fill ACPI IOAPIC accordingly. */ } void pch_lpc_soc_fill_io_resources(struct device *dev) -- cgit v1.2.3