From 051ee4e3ad14861b64ddb1da5af473812770279a Mon Sep 17 00:00:00 2001 From: Arthur Heymans Date: Wed, 11 Nov 2020 11:17:30 +0100 Subject: soc/intel/xeon_sp: Lock down DMICTL This is required for CBnT. Change-Id: I290742c163f5f067c8d529ddca8e2d8572ab6e6a Signed-off-by: Arthur Heymans Reviewed-on: https://review.coreboot.org/c/coreboot/+/47449 Reviewed-by: Christian Walter Reviewed-by: Angel Pons Tested-by: build bot (Jenkins) --- src/soc/intel/xeon_sp/pch.c | 3 +++ 1 file changed, 3 insertions(+) (limited to 'src/soc/intel/xeon_sp') diff --git a/src/soc/intel/xeon_sp/pch.c b/src/soc/intel/xeon_sp/pch.c index 5427952688..2b35223d16 100644 --- a/src/soc/intel/xeon_sp/pch.c +++ b/src/soc/intel/xeon_sp/pch.c @@ -39,6 +39,9 @@ static void soc_config_acpibase(void) reg32 = (0x3f << 18) | ACPI_BASE_ADDRESS | 1; pcr_write32(PID_DMI, PCR_DMI_ACPIBA, reg32); pcr_write32(PID_DMI, PCR_DMI_ACPIBDID, 0x23a8); + + reg32 = pcr_read32(PID_DMI, PCR_DMI_DMICTL); + pcr_write32(PID_DMI, PCR_DMI_DMICTL, reg32 | PCR_DMI_DMICTL_SRLOCK); } void bootblock_pch_init(void) -- cgit v1.2.3