From c19e32e69d8a9e42346fe81432bbdfc1e1c8febc Mon Sep 17 00:00:00 2001 From: Jincheng Li Date: Mon, 1 Jul 2024 14:09:37 +0800 Subject: soc/intel/xeon_sp: Share save_dimm_info among Xeon-SP SoCs TEST=Build and boot on archercity CRB No changes in boot log and 'dmidecode' result under centos TEST=Build and boot on avenuecity CRB It will add DMI type 16,17,19,20 Change-Id: I2f5b7a4ffabed033d54d4724b3c41246503166fe Signed-off-by: Jincheng Li Reviewed-on: https://review.coreboot.org/c/coreboot/+/83325 Tested-by: build bot (Jenkins) Reviewed-by: Angel Pons --- src/soc/intel/xeon_sp/spr/Makefile.mk | 1 + 1 file changed, 1 insertion(+) (limited to 'src/soc/intel/xeon_sp/spr/Makefile.mk') diff --git a/src/soc/intel/xeon_sp/spr/Makefile.mk b/src/soc/intel/xeon_sp/spr/Makefile.mk index a3d6af5cc2..0c4f0635e3 100644 --- a/src/soc/intel/xeon_sp/spr/Makefile.mk +++ b/src/soc/intel/xeon_sp/spr/Makefile.mk @@ -9,6 +9,7 @@ subdirs-y += ../../../../cpu/x86/tsc subdirs-y += ../../../../cpu/intel/microcode romstage-y += romstage.c soc_util.c +romstage-y += ../dimm.c romstage-$(CONFIG_DISPLAY_HOBS) += hob_display.c romstage-$(CONFIG_DISPLAY_UPD_DATA) += upd_display.c -- cgit v1.2.3