From e3b18bf63d8d3bba13613fd1c9c6271e96e0e639 Mon Sep 17 00:00:00 2001 From: Marc Jones Date: Mon, 25 Jan 2021 12:23:23 -0700 Subject: soc/intel/xeon_sp/skx: Add soc_acpi_name Add the soc_scpi_name to the soc pci_ops. This is used by ACPI table generation and required by the intel common XHCI device. Change-Id: Idc09d53f14dfb1e42f904dfd4e87e8c09e155135 Signed-off-by: Marc Jones Reviewed-on: https://review.coreboot.org/c/coreboot/+/49912 Tested-by: build bot (Jenkins) Reviewed-by: Jonathan Zhang Reviewed-by: Jay Talbott --- src/soc/intel/xeon_sp/skx/chip.c | 13 +++++++++++++ 1 file changed, 13 insertions(+) (limited to 'src/soc/intel/xeon_sp/skx') diff --git a/src/soc/intel/xeon_sp/skx/chip.c b/src/soc/intel/xeon_sp/skx/chip.c index 8b08326fb6..4d50a25236 100644 --- a/src/soc/intel/xeon_sp/skx/chip.c +++ b/src/soc/intel/xeon_sp/skx/chip.c @@ -3,6 +3,7 @@ #include #include #include +#include #include #include #include @@ -11,12 +12,24 @@ #include #include +#if CONFIG(HAVE_ACPI_TABLES) +const char *soc_acpi_name(const struct device *dev) +{ + if (dev->path.type == DEVICE_PATH_DOMAIN) + return "PC00"; + return NULL; +} +#endif + static struct device_operations pci_domain_ops = { .read_resources = &pci_domain_read_resources, .set_resources = &xeonsp_pci_domain_set_resources, .scan_bus = &xeonsp_pci_domain_scan_bus, #if CONFIG(HAVE_ACPI_TABLES) .write_acpi_tables = &northbridge_write_acpi_tables, + #if CONFIG(HAVE_ACPI_TABLES) + .acpi_name = soc_acpi_name +#endif #endif }; -- cgit v1.2.3