From cd41fa378d03eb2509d5757c441f242bc3f98a6f Mon Sep 17 00:00:00 2001
From: Venkata Krishna Nimmagadda <venkata.krishna.nimmagadda@intel.com>
Date: Fri, 17 Apr 2020 00:21:22 -0700
Subject: soc/intel/tigerlake: Add method to look up GPIO com ID for an index

This patch adds GPID, a helper method to look up GPIO community ID for
an index.

This patch also includes Intel's common GPIO ASL code. CGPM method in
the common code uses the GPID method introduced in this patch.

BUG=b:148892882
BRANCH=none
TEST="BUILD volteer and ripto"

Signed-off-by: Venkata Krishna Nimmagadda <venkata.krishna.nimmagadda@intel.com>
Change-Id: Id6a00fb8adef0285d6bbc35cd5a44539bd3be6b8
Reviewed-on: https://review.coreboot.org/c/coreboot/+/40478
Reviewed-by: Venkata Krishna Nimmagadda <Venkata.krishna.nimmagadda@intel.com>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
---
 src/soc/intel/tigerlake/acpi/gpio.asl | 33 +++++++++++++++++++++++++++++++++
 1 file changed, 33 insertions(+)

(limited to 'src/soc/intel/tigerlake')

diff --git a/src/soc/intel/tigerlake/acpi/gpio.asl b/src/soc/intel/tigerlake/acpi/gpio.asl
index 2b4aff09c0..9b8a175659 100644
--- a/src/soc/intel/tigerlake/acpi/gpio.asl
+++ b/src/soc/intel/tigerlake/acpi/gpio.asl
@@ -4,6 +4,7 @@
 #include <soc/irq.h>
 #include <soc/pcr_ids.h>
 #include <intelblocks/gpio.h>
+#include <soc/intel/common/acpi/gpio.asl>
 #include "gpio_op.asl"
 
 Device (GCM0)
@@ -142,3 +143,35 @@ Method (GADD, 1, NotSerialized)
 	Local2 = PCRB(Local0) + PAD_CFG_BASE + (Local1 * 16)
 	Return (Local2)
 }
+
+/*
+ * Return PCR Port ID of GPIO Communities
+ *
+ * Arg0: GPIO Community (0-5)
+ */
+Method (GPID, 1, Serialized)
+{
+	Switch (ToInteger (Arg0))
+	{
+		Case (0) {
+			Local0 = PID_GPIOCOM0
+		}
+		Case (1) {
+			Local0 = PID_GPIOCOM1
+		}
+		Case (2) {
+			Local0 = PID_GPIOCOM2
+		}
+		Case (4) {
+			Local0 = PID_GPIOCOM4
+		}
+		Case (5) {
+			Local0 = PID_GPIOCOM5
+		}
+		Default {
+			Return (0)
+		}
+	}
+
+	Return (Local0)
+}
-- 
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