From c7cd4a63344220d5c92b3b3fe8fccd9a023318e8 Mon Sep 17 00:00:00 2001 From: Sean Rhodes Date: Fri, 25 Aug 2023 13:53:10 +0100 Subject: soc/intel/{alderlake,meteorlake}: Remove the dummy PS0 and PS3 methods Signed-off-by: Sean Rhodes Change-Id: I8515407eb10e1a74f37ea5a80fa31533c38badec Reviewed-on: https://review.coreboot.org/c/coreboot/+/77455 Reviewed-by: Kapil Porwal Tested-by: build bot (Jenkins) --- src/soc/intel/tigerlake/acpi/tcss_dma.asl | 7 ------- 1 file changed, 7 deletions(-) (limited to 'src/soc/intel/tigerlake') diff --git a/src/soc/intel/tigerlake/acpi/tcss_dma.asl b/src/soc/intel/tigerlake/acpi/tcss_dma.asl index dd6d1bb3ac..951d83d2e3 100644 --- a/src/soc/intel/tigerlake/acpi/tcss_dma.asl +++ b/src/soc/intel/tigerlake/acpi/tcss_dma.asl @@ -96,13 +96,6 @@ Method (D3CE, 0, Serialized) * TCSS D3 Cold and TBT RTD3 is only available when system power state is in S0. */ Name (SD3C, 0) -Method (_PS0, 0, Serialized) -{ -} - -Method (_PS3, 0, Serialized) -{ -} Method (_DSW, 3) { -- cgit v1.2.3